IP Library › Granted Patent US 10,373,843
Granted Patent B2
US 10,373,843 · App. 14/790,668 · Granted Aug 6, 2019

Display device and method for manufacturing the same

Inventors: Shunpei Yamazaki (Setagaya, JP); Junichiro Sakata (Atsugi, JP); Masashi Tsubuku (Atsugi, JP); Kengo Akimoto (Atsugi, JP); Miyuki Hosoba (Isehara, JP); Masayuki Sakakura (Tochigi, JP); Yoshiaki Oikawa (Sagamihara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L21/477G02F1/1368G02F1/133345H01L21/02565H01L21/02664H01L27/1225H01L27/1248H01L27/1251H01L27/1259H01L29/66969H01L29/7869H01L29/78696
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Quick Facts
Patent No.
US 10,373,843
App. No.
14/790,668
Granted
Aug 6, 2019
Kind
B2
Abstract

An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

Claims (16)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer;

performing a first heat treatment on the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer after performing the first heat treatment, wherein the source electrode layer is formed over and in contact with a first region of the oxide semiconductor layer and the drain electrode layer is formed over and in contact with a second region of the oxide semiconductor layer;

forming an inorganic insulating layer over and in contact with a third region of the oxide semiconductor layer, the source electrode layer, and the drain electrode layer so that a resistance of the third region of the oxide semiconductor layer is increased; and

performing a second heat treatment after forming the inorganic insulating layer,

wherein the third region of the oxide semiconductor layer is between the first region of the oxide semiconductor layer and the second region of the oxide semiconductor layer, and

wherein a conductivity of the third region of the oxide semiconductor layer is lower than a conductivity of each of the first region and the second region of the oxide semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the first heat treatment on the oxide semiconductor layer is performed under an atmosphere including nitrogen.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein the first heat treatment on the oxide semiconductor layer is performed at a temperature higher than or equal to 400° C.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the second heat treatment is performed on the inorganic insulating layer so that oxygen in the inorganic insulating layer is supplied to the third region of the oxide semiconductor layer.

5. The method for manufacturing a semiconductor device according to claim 4 , wherein the second heat treatment on the inorganic insulating layer is performed under an atmosphere including nitrogen.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises a crystal.

7. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer is a stacked film.

8. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

9. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, tin, and zinc.

Priority Claims (1)
JP 2009-196618 · Aug 27, 2009 · national
Continuity (7)
Continuation 14639149 · Mar 5, 2015
Continuation 14502012 · Sep 30, 2014
Continuation 14196236 · Mar 4, 2014
Continuation 13939468 · Jul 11, 2013
Continuation 13363405 · Feb 1, 2012
Continuation 12861190 · Aug 23, 2010
Related Publication 20150303072A1 · Oct 22, 2015
Cited By (3)
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