Method of forming a gate structure of a semiconductor device
A method of forming a gate structure of a semiconductor device including depositing a high-k dielectric layer over a substrate is provided. A dummy metal layer is formed over the high-k dielectric layer. The dummy metal layer includes fluorine. A high temperature process is performed to drive the fluorine from the dummy metal layer into the high-k dielectric layer thereby forming a passivated high-k dielectric layer. Thereafter, the dummy metal layer is removed. At least one work function layer over the passivated high-k dielectric layer is formed. A fill metal layer is formed over the at least one work function layer.
1. A method of forming a gate structure of a semiconductor device, comprising:
forming a dummy gate structure on a substrate;
removing the dummy gate structure to form an opening;
disposing a high-k dielectric layer in the opening;
forming a dummy metal layer over the high-k dielectric layer in the opening, wherein the dummy metal layer includes fluorine and a metal;
driving fluorine from the dummy metal layer into the high-k dielectric layer thereby forming a passivated high-k dielectric layer;
forming at least one work function layer over the passivated high-k dielectric layer; and
forming a fill metal layer over the at least one work function layer.
2. The method of claim 1 , further comprising:
forming a metal nitride layer over the high-k dielectric layer underlying the dummy metal layer.
3. The method of claim 2 , further comprising:
prior to forming the metal nitride layer, forming another metal nitride layer over the high-k dielectric layer.
4. The method of claim 1 , wherein the metal is aluminum, titanium or tantalum.
5. The method of claim 1 , wherein the forming the dummy metal layer includes performing an atomic layer deposition (ALD) process with precursors providing the fluorine and the metal.
6. The method of claim 1 , further comprising removing the dummy metal layer after driving the fluorine.
7. The method of claim 1 , wherein a process performed for the driving fluorine from the dummy metal layer into the high-k dielectric layer also drives nitrogen to the high-k dielectric layer.
8. The method of claim 1 , wherein the removing the dummy gate structure to form the opening includes defining sidewalls of the opening by gate spacers.
9. The method of claim 8 , wherein the forming the fill metal layer fills the opening such that the fill metal layer has a top surface coplanar with a top surface of the gate spacers.
10. A method of forming a semiconductor device, comprising:
depositing a high-k dielectric layer over a substrate;
forming a metal nitride layer over the high-k dielectric layer, wherein the metal nitride layer comprises a composition including a first metal (M 1 );
forming a dummy layer over the high-k dielectric layer, wherein the dummy layer includes a composition comprising a second metal (M 2 ) and fluorine (F), wherein the first metal is a different metal than the second metal;
driving fluorine (F) from the dummy layer into the high-k dielectric layer to form a passivated high-k dielectric layer;
modifying the metal nitride layer to form a metal alloy layer including the first metal and the second metal;
removing the dummy layer and removing the metal alloy layer;
forming at least one work function layer over the passivated high-k dielectric layer; and
forming a fill metal layer over the at least one work function layer.
11. The method of claim 10 , wherein the modifying the metal nitride layer occurs during the forming the dummy layer.
12. The method of claim 10 , wherein M 1 and M 2 are tantalum and tungsten respectively.
13. The method of claim 10 , wherein the driving fluorine (F) includes an anneal.
14. The method of claim 10 , further comprising:
forming a titanium nitride layer over the passivated high-k dielectric layer and under the at least one work function layer.
15. The method of claim 14 , wherein the titanium nitride layer is deposited directly on the passivated high-k dielectric layer.
16. The method of claim 10 , wherein the forming the dummy layer includes performing at least one of an atomic layer deposition (ALD) and a chemical vapor deposition (CVD) process.
17. A method of forming a gate structure of a semiconductor device, comprising:
depositing a gate dielectric layer over a substrate;
forming a dummy metal layer over the gate dielectric layer, wherein the dummy metal layer includes a first metal and fluorine;
driving fluorine from the dummy metal layer into the gate dielectric layer;
removing the dummy metal layer after the driving the fluorine; and
after the removing, forming at least one work function layer over the gate dielectric layer.
18. The method of claim 17 , further comprising:
forming a tantalum nitride layer over the gate dielectric layer and underlying the dummy metal layer.
19. The method of claim 18 , wherein the tantalum nitride layer is transformed to a tantalum alloy layer including tungsten during the driving fluorine.
20. The method of claim 19 , wherein the forming the at least one work function layer includes forming the at least one work function layer on the tantalum alloy layer.