IP Library Granted Patent US 10,438,846
Granted Patent B2
US 10,438,846 · App. 15/880,324 · Granted Oct 8, 2019

Physical vapor deposition process for semiconductor interconnection structures

Inventors: Nai-Hao Yang (Keelung, TW); Hung-Wen Su (Jhubei, TW); Kuan-Chia Chen (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/76877H01L21/2855H01L21/324H01L21/67103H01L23/53238
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,438,846
App. No.
15/880,324
Granted
Oct 8, 2019
Kind
B2
Abstract

The present disclosure provides methods for forming a conductive fill material (e.g., a conductive feature) by a physical vapor deposition (PVD) process. In one embodiment, a method of forming a conductive fill material on a substrate includes maintaining a first substrate temperature at a first range for a first period of time while forming a pre-layer of a conductive fill material on a substrate, providing a thermal energy to the substrate to maintain the substrate at a second substrate temperature at a second range for a second period of time, wherein the second substrate temperature is higher than the first substrate temperature, and continuously providing the thermal energy to the substrate to maintain the substrate a third substrate temperature at a third range for a third period of time to form a bulk layer of the conductive fill material on the substrate.

Claims (49)

1. A method of forming a conductive fill material on a substrate, comprising:

maintaining the substrate at a first substrate temperature in a first range for a first period of time while forming a pre-layer of the conductive fill material along sidewalls and a bottom of an opening in a dielectric layer over the substrate;

providing thermal energy to the substrate to maintain the substrate at a second substrate temperature in a second range for a second period of time, wherein the second substrate temperature is higher than the first substrate temperature, wherein providing the thermal energy reflows the pre-layer to fill a lower portion of the opening while an upper portion of the opening is free of the pre-layer; and

continuously providing the thermal energy to the substrate to maintain the substrate at a third substrate temperature in a third range for a third period of time while forming a bulk layer of the conductive fill material to fill the upper portion of the opening.

2. The method of claim 1 , wherein the third substrate temperature is greater than the first substrate temperature.

3. The method of claim 1 , wherein the third substrate temperature is less than the second substrate temperature.

4. The method of claim 1 , wherein forming the pre-layer of the conductive fill material on the substrate further comprises:

applying a first bias power to a substrate support pedestal where the substrate is positioned; and

subsequently applying a second bias power to the substrate support pedestal, wherein the second bias power is greater than the first bias power.

5. The method of claim 4 , wherein continuously providing the thermal energy to the substrate to maintain the substrate at the third substrate temperature further comprises:

applying a third bias power to the substrate support pedestal, wherein the third bias power is greater than the first bias power but less than the second bias power.

6. The method of claim 1 , wherein providing the thermal energy to the substrate to maintain the substrate at the second substrate temperature further comprises:

reflowing the pre-layer formed on the substrate while maintaining the substrate at the second substrate temperature.

7. The method of claim 6 , wherein reflowing the pre-layer further comprises:

increasing thickness conformity of the pre-layer.

8. The method of claim 1 , wherein the pre-layer has a thickness in a range from 100 Å to 250 Å and the conductive fill material has a thickness in a range from 500 Å to 700 Å.

9. The method of claim 1 , wherein maintaining the substrate at the first substrate temperature in the first range further comprises:

maintaining the substrate temperature in a range from 5 degrees Celsius to 50 degrees Celsius.

10. The method of claim 1 , wherein providing the thermal energy to the substrate to maintain the substrate at the second substrate temperature further comprises:

controlling a heating device of a substrate support pedestal on which the substrate is positioned at a temperature in a range from 200 degrees to 400 degrees Celsius.

11. The method of claim 1 , wherein continuously providing the thermal energy to the substrate to maintain the substrate at the third substrate temperature further comprises:

controlling a heating device of a substrate support pedestal on which the substrate is positioned at a temperature in a range from 90 degrees to 200 degrees Celsius.

12. The method of claim 1 , wherein maintaining the substrate at the first substrate temperature in the first range further comprises:

sputtering a material from a target in a processing chamber where the substrate is positioned to form the pre-layer of the conductive fill material on the substrate.

13. The method of claim 1 , wherein continuously providing the thermal energy to the substrate to maintain the substrate at the third substrate temperature further comprises:

sputtering a material from a target in a processing chamber where the substrate is positioned to form the bulk layer of the conductive fill material on the substrate.

14. A method of forming a conductive fill material on a substrate, comprising:

forming a pre-layer of the conductive fill material in a dielectric layer by controlling the substrate at a first substrate temperature;

reflowing the pre-layer by maintaining the substrate at a second substrate temperature, wherein the second substrate temperature is greater than the first substrate temperature; and

forming a bulk layer of the conductive fill material on the pre-layer by maintaining the substrate at a third substrate temperature, wherein the third substrate temperature is greater than the first substrate temperature, wherein the bulk layer extends into the dielectric layer.

15. The method of claim 14 , wherein forming the pre-layer further comprises:

sputtering a material from a target in a processing chamber where the substrate is positioned while maintaining the substrate at the first substrate temperature.

16. The method of claim 15 , further comprising:

applying a first bias power to a substrate support pedestal disposed in the processing chamber where the substrate is placed to form the pre-layer; and

applying a second bias power to the substrate support pedestal to continue forming the pre-layer, wherein the second bias power is greater than the first bias power.

17. The method of claim 16 , wherein forming the bulk layer further comprises:

applying a third bias power to the substrate support pedestal to form the bulk layer, wherein the third bias power is greater than the first bias power but less than the second bias power.

18. The method of claim 17 , wherein applying the third bias power further comprises:

sputtering the material from the target in the processing chamber where the substrate is positioned while maintaining the substrate at the third substrate temperature.

19. A method comprising:

forming an opening in a dielectric layer disposed over a substrate, the opening exposing an underlying electrically conductive feature;

forming a barrier layer along sidewalls of the dielectric layer exposed by the opening and along an upper surface of the electrically conductive feature; and

filling the opening with an electrically conductive fill material, wherein filling the opening comprises:

forming a pre-layer of the electrically conductive fill material in the opening over the barrier layer at a first temperature;

reflowing the pre-layer at a second temperature higher than the first temperature; and

forming a bulk layer of the electrically conductive fill material in the opening over the pre-layer at a third temperature after reflowing the pre-layer, the third temperature being higher than the first temperature.

20. The method of claim 19 , wherein forming the pre-layer further comprises:

depositing the pre-layer while applying a first bias power to a substrate support pedestal on which the substrate is positioned; and

subsequently, continue depositing the pre-layer while applying a second bias power higher than the first bias power to the substrate support pedestal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2018
From: YANG, NAI-HAO; SU, HUNG-WEN; CHEN, KUAN-CHIA
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 046047/0080 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2018
From: YANG, NAI-HAO; SU, HUNG-WEN; CHEN, KUAN-CHIA
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 046344/0423 →
Continuity (2)
Provisional Application 62591257 · Nov 28, 2017
Related Publication 20190164825A1 · May 30, 2019