IP Library › Granted Patent US 10,448,506
Granted Patent B2
US 10,448,506 · App. 16/238,586 · Granted Oct 15, 2019

Wiring substrate and process for producing it

Inventors: Tomoya Hosoda (Chiyoda-ku, JP); Tatsuya Terada (Chiyoda-ku, JP)
Assignee: AGC Inc.
H05K1/0373H05K1/024H05K1/03H05K1/11H05K1/115H05K3/18H05K3/40H05K3/422H01Q1/38H05K1/0393H05K2201/0154H05K2201/0212H05K2203/072H05K2203/0776H05K2203/0779H05K2203/095
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Quick Facts
Patent No.
US 10,448,506
App. No.
16/238,586
Granted
Oct 15, 2019
Kind
B2
Abstract

To provide a wiring substrate having excellent transmission characteristics, of which initial failure of a plating layer formed on an inner wall surface of a hole is suppressed regardless of the type of the pre-treatment applied to the inner wall surface of the hole, and of which the plating layer has favorable heat resistance, and a process for producing it. A wiring substrate 10 comprising an electrical insulator layer 20, a first conductor layer 32 formed on a first surface of the electrical insulator layer 20, a second conductor layer 34 formed on a second surface of the electrical insulator layer 20, and a plating layer 42 provided on an inner wall surface of a hole 40 which opens from the first conductor layer 32 through the second conductor layer 34; wherein the electrical insulator layer 20 has a heat resistant resin layer 22 containing a heat resistant resin and a resin powder; the resin powder is formed from a resin material containing a melt-formable fluororesin having a functional group such as a carbonyl group-containing group; the content of the resin powder is from 5 to 70 mass % to the heat resistant resin layer 22; and the electrical insulator layer 20 has a dielectric constant of from 2.0 to 3.5.

Claims (28)

1. A wiring substrate comprising:

an electrical insulator layer,

a first conductor layer formed on a first surface of the electrical insulator layer,

a second conductor layer formed on a second surface opposite from the first surface of the electrical insulator layer, and

a plating layer formed on an inner wall surface of a hole which opens from the first conductor layer through the second conductor layer,

wherein the electrical insulator layer has a heat resistant resin layer containing a heat resistant resin and a resin powder,

the resin powder is formed from a resin material containing a melt-formable fluororesin having at least one type of functional group selected from the group consisting of a carbonyl group-containing group, a hydroxy group, an epoxy group and an isocyanate group,

the content of the resin powder is from 5 to 70 mass % to the heat resistant resin layer, and

the electrical insulator layer has a dielectric constant of from 2.0 to 3.5.

2. The wiring substrate according to claim 1 , wherein the fluororesin has a melting point of at least 260° C.

3. The wiring substrate according to claim 1 , wherein the at least one type of functional group is a carbonyl group-containing group, and the carbonyl group-containing group is at least one member selected from the group consisting of a group having a carbonyl group between carbon atoms of a hydrocarbon group, a carbonate group, a carboxy group, a haloformyl group, an alkoxycarbonyl group and an acid anhydride residue.

4. The wiring substrate according to claim 1 , wherein the content of the functional groups in the fluororesin is from 10 to 60,000 groups per 1×10 6 carbon atoms in the main chain of the fluororesin.

5. The wiring substrate according to claim 1 , wherein the electrical insulator layer has a dielectric constant of from 2.0 to 3.0.

6. The wiring substrate according to claim 1 , wherein the electrical insulator layer has a linear expansion coefficient of from 0 to 100 ppm/° C.

7. The wiring substrate according to claim 1 , wherein the average particle size of the resin powder to be added to the heat resistant resin layer is from 0.02 to 5 μm, and the volume-based accumulative 90% size (D 90 ) of the resin powder is at most 6 μm.

8. The wiring substrate according to claim 1 , wherein the water droplet contact angle of the electrical insulator layer is from 60° to 100°.

9. The wiring substrate according to claim 1 , wherein the average particle size of the resin powder contained in the electrical insulator layer is from 1 to 7 μm.

10. The wiring substrate according to claim 1 , wherein the rate of change of the resistance of the wiring substrate at 260° C. in the 100th cycle of a thermal shock test to the resistance of the wiring substrate at 260° C. in the first cycle of a thermal shock test is within ±10%.

11. A process for producing the wiring substrate as defined in claim 1 , which comprises:

forming the hole in a laminate comprising the first conductor layer, the electrical insulator layer and the second conductor layer laminated in this order;

applying a pre-treatment to the inner wall surface of the hole, and

forming the plating layer on the inner wall surface of the hole having a pre-treatment applied thereto.

12. A process for producing the wiring substrate as defined in claim 1 , which comprises:

forming the hole in a laminate having the first conductor layer laminated on the first surface of the electrical insulator layer;

applying a pre-treatment to the inner wall surface of the hole,

forming the plating layer on the inner wall surface of the hole having a pre-treatment applied thereto, and

forming the second conductor layer on the second surface of the electrical insulator layer.

13. The process for producing the wiring substrate according to claim 11 , wherein as the pre-treatment, either one or both of a treatment with a permanganic acid solution and a plasma treatment is conducted without conducting an etching treatment using metal sodium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2019
From: HOSODA, TOMOYA; TERADA, TATSUYA
To: AGC INC.
Reel/Frame 047886/0469 →
Priority Claims (1)
JP 2016-171195 · Sep 1, 2016 · national
Continuity (2)
Continuation PCTJP2017031471 · Aug 31, 2017
Related Publication 20190141833A1 · May 9, 2019