IP Library › Granted Patent US 10,453,764
Granted Patent B2
US 10,453,764 · App. 15/675,610 · Granted Oct 22, 2019

Molding for large panel fan-out package

Inventors: Shao-An Chen (Kaohsiung, TW); Po-Wei Lu (Kaohsiung, TW); Ming Tsung Shen (Kaohsiung, TW); Yu-Tzu Peng (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L23/3114H01L21/561H01L21/568H01L23/3128H01L23/5389H01L24/19H01L24/20H01L24/96H01L24/97H01L21/565H01L23/562H01L2224/04105H01L2224/12105H01L2224/16227H01L2224/18H01L2224/214H01L2224/32225H01L2224/73204H01L2224/73267H01L2224/81005H01L2224/83005H01L2224/9222H01L2224/95001H01L2224/97H01L2924/15311H01L2924/1815H01L2924/18162H01L2924/3511
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Quick Facts
Patent No.
US 10,453,764
App. No.
15/675,610
Granted
Oct 22, 2019
Kind
B2
Abstract

The present disclosure relates to wafer level packages including one or more semiconductor dies and a method of manufacturing the same. A method comprises: providing a carrier having a predetermined area, disposing a semiconductor device on the predetermined area, and forming a sacrificial wall on a periphery of the predetermined area.

Claims (25)

1. A method of manufacturing a semiconductor device package, comprising:

providing a carrier having a predetermined area;

disposing a semiconductor device on the predetermined area;

forming a sacrificial wall on a periphery of the predetermined area, the sacrificial wall comprising a polymer material; and

removing the sacrificial wall.

2. The method of claim 1 , wherein removing the sacrificial wall is performed by at least one of an optical technique, a mechanical technique, a thermal technique or a chemical technique.

3. The method of claim 1 , further comprising forming an encapsulant covering the semiconductor device prior to the formation of the sacrificial wall.

4. The method of claim 3 , further comprising forming a cavity in the encapsulant to accommodate the sacrificial wall.

5. The method of claim 4 , wherein the cavity is formed such that a sidewall defining the cavity and a bottom defining the cavity forms an angle in a range from approximately 45 degrees to approximately 90 degrees.

6. The method of claim 1 , further comprising:

forming an encapsulant covering the semiconductor device; and

removing the carrier.

7. The method of claim 6 , further comprising disposing an adhesive film on the encapsulant subsequent to removing the carrier.

8. The method of claim 7 , further comprising applying an expanding force on the encapsulant.

9. The method of claim 1 , further comprising forming an encapsulant covering the semiconductor device subsequent to forming the sacrificial wall.

10. The method of claim 9 , further comprising removing the carrier.

11. The method of claim 10 , further comprising removing the sacrificial wall.

12. The method of claim 11 , further comprising disposing a first adhesive film on a first surface of the encapsulant, and disposing a second adhesive film on a second surface of the encapsulant, wherein the second surface is opposite to the first surface.

13. The method of claim 7 , further comprising applying a force in a first direction on the adhesive film.

14. The method of claim 7 , further comprising removing the adhesive film to form the semiconductor device package.

15. The method of claim 7 , further comprising cutting the encapsulant to form the semiconductor device package.

16. The method of claim 10 , wherein the encapsulant has a first surface, the method further comprising forming a first adhesive film on the first surface of the encapsulant subsequent to removing the carrier.

17. The method of claim 16 , further comprising removing the sacrificial wall to form the semiconductor device package.

18. The method of claim 17 , wherein the encapsulant has a second surface opposite to the first surface, the method further comprising forming a second adhesive film on the second surface of the encapsulant.

19. The method of claim 18 , further comprising removing the first adhesive film to form the semiconductor device package.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2018
From: CHEN, SHAO-AN; LU, PO-WEI; SHEN, MING TSUNG; PENG, YU-TZU
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 044566/0109 →
Continuity (4)
Provisional Application 62382064 · Aug 31, 2016
Provisional Application 62374558 · Aug 12, 2016
Provisional Application 62373759 · Aug 11, 2016
Related Publication 20180047651A1 · Feb 15, 2018
Cited By (1)
US 12,538,815