Display substate, mother substrate for making the same, and fabricating method thereof

1. A method of fabricating a mother substrate having a first region and a second region, the mother substrate is formed to comprise a plurality of display substrate units in the first region;

the method comprising:

forming a buffer layer on and in contact with a base substrate in the first region, and forming a mat layer on and in contact with the base substrate in the second region for reducing segment difference between the first region and the second region;

wherein the buffer layer is formed in a display region of each of the plurality of display substrate units;

the buffer layer and the mat layer are made of an insulating material;

each of the plurality of display substrate units is formed to comprise one or more layers on a side of the buffer layer distal to the base substrate; and

a maximum thickness of the mat layer is h1, and the thickness of the buffer layer is h2, h1≤h2;

wherein forming the mat layer comprises forming an array of a plurality of mat units of non-uniform thicknesses;

wherein, subsequent to forming the mat layer, the method further comprises:

coating a photoresist material free of surfactant and having a viscosity in a range of about 6 centipoise to about 7 centipoise on a side of the buffer layer and the mat layer away from the base substrate; and

spinning the mother substrate to evenly distribute the photoresist material on the mother substrate at a spinning speed lower than 600 rpm;

wherein the photoresist material is coated to have a thickness greater than 2.0 μm.

2. The method of claim 1 , wherein 0.6≤h1/h2≤0.9.

3. The method of claim 1 , wherein the second region comprises a plurality of rows and a plurality of columns intersecting each other forming a plurality of intersection sections, the plurality of rows and the plurality of columns dividing the mother substrate into the plurality of display substrate units; the mat layer is formed within the plurality of intersection sections.

4. The method of claim 1 , wherein the plurality of mat units have a substantially the same shape, and a trapezoidal cross-section along a plane perpendicular to the base substrate.

5. The method of claim 1 , wherein a maximum thickness of the mat layer is h1, and the thickness of the buffer layer is h2, h1=h2, the mat layer abuts a side plane of the buffer layer at the interface between the first region and the second region, the mat layer has a right triangular cross-section along a plane perpendicular to the base substrate.

6. The method of claim 5 , wherein the mat layer comprises a bottom plane in contact with the base substrate and an inclined side plane facing away a side plane of the buffer layer, the inclined side plane and the bottom plane defines an angle α, and 20°≤α≤60°.

7. The method of claim 1 , wherein forming the mat layer comprises patterning a first material layer;

wherein patterning the first material layer comprises:

forming a photoresist layer on a side of the first material layer distal to the base substrate;

exposing the photoresist layer with a mask plate comprising a sub-resolution feature corresponding to the mat layer;

developing the exposed photoresist layer to obtain a photoresist pattern including a first section comprising a portion corresponding to the mat layer, and a second section corresponding to remaining portion of the photoresist layer;

removing the photoresist layer in the second section; and

etching the first material layer in the second section.

8. The method of claim 7 , wherein the buffer layer and the mat layer are made of a same insulating material and patterned in a single patterning process.

9. A display substrate having a display region and a peripheral region fabricated by cutting the mother substrate formed according to the method of claim 1 , comprising:

a second buffer layer on and in contact with a second base substrate in the display region; and

a second mat layer on and in contact with the second base substrate in the peripheral region;

wherein the second buffer layer and the second mat layer are made of an insulating material;

the display substrate comprises one or more layers on a side of the second buffer layer distal to the second base substrate; and

a maximum thickness of the second mat layer is h1, and the thickness of the second buffer layer is h2, h1≤h2.

10. The display substrate of claim 9 , wherein the second buffer layer and the second mat layer are made of a same insulating material.

11. The display substrate of claim 10 , wherein 0.6≤h1/h2≤0.9.

12. The display substrate of claim 9 , wherein the second mat layer is within one or more corner portions of the peripheral region.

13. The display substrate of claim 9 , wherein the second mat layer comprises an array of a plurality of second mat units.

14. The display substrate of claim 13 , wherein the plurality of second mat units have a substantially the same shape, and a trapezoidal cross-section along a plane perpendicular to the base substrate.

15. The display substrate of claim 9 , wherein a maximum thickness of the second mat layer is h1, and the thickness of the buffer layer is h2, h1=h2, the second mat layer abuts a side plane of the second buffer layer at the interface between the display region and the peripheral region, the second mat layer has a right triangular cross-section along a plane perpendicular to the second base substrate.

16. The display substrate of claim 9 , wherein the second mat layer comprises a bottom plane and an inclined side plane distal to a side plane of the second buffer layer, the inclined side plane and the bottom plane defines an angle α, and 20°≤α≤60°.

17. A display panel comprising a display substrate of claim 9 .