IP Library › Granted Patent US 10,461,159
Granted Patent B2
US 10,461,159 · App. 15/966,773 · Granted Oct 29, 2019

Method of manufacturing semiconductor device and the semiconductor device

Inventors: Hironobu Miyamoto (Ibaraki, JP); Tatsuo Nakayawa (Ibaraki, JP); Yasuhiro Okamoto (Ibaraki, JP); Atsushi Tsuboi (Ibaraki, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L29/2003H01L21/0262H01L29/0847H01L29/4232H01L29/42376H01L29/432H01L29/513H01L29/66462H01L29/7783H01L29/402H01L29/4236
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Quick Facts
Patent No.
US 10,461,159
App. No.
15/966,773
Granted
Oct 29, 2019
Kind
B2
Abstract

Characteristics of a semiconductor device using a nitride semiconductor are improved. A semiconductor device of the present invention includes a buffer layer, a channel layer, a barrier layer, a mesa-type 2DEG dissolving layer, a source electrode, a drain electrode, a gate insulating film formed on the mesa-type 2DEG dissolving layer, and an overlying gate electrode. The gate insulating film of the semiconductor device includes a sputtered film formed on the mesa-type 2DEG dissolving layer and a CVD film formed on the sputtered film. The sputtered film is formed in a non-oxidizing atmosphere by a sputtering process using a target including an insulator. This makes it possible to reduce positive charge amount at a MOS interface and in gate insulating film and increase a threshold voltage, and thus improve normally-off characteristics.

Claims (35)

1. A method of manufacturing a semiconductor device, the method comprising the steps of:

(a) forming a second nitride semiconductor layer on a first nitride semiconductor layer;

(b) forming a third nitride semiconductor layer on the second nitride semiconductor layer;

(c) forming a fourth mesa-type nitride semiconductor layer on the third nitride semiconductor layer;

(d) forming a gate insulating film on the fourth mesa-type nitride semiconductor layer; and

(e) forming a gate electrode on the gate insulating film;

wherein the second nitride semiconductor layer has an electron affinity equal to or larger than electron affinity of the first nitride semiconductor layer,

wherein the third nitride semiconductor layer has an electron affinity smaller than the electron affinity of the first nitride semiconductor layer,

wherein the fourth nitride semiconductor layer has an electron affinity equal to or smaller than the electron affinity of the second nitride semiconductor layer, and

wherein the step (d) includes the steps of:

(d1) forming a first film including a first insulator on the fourth mesa-type nitride semiconductor layer by a sputtering process using a target including the first insulator; and

(d2) forming a second film including a second insulator on the first film by a CVD process.

2. The method according to claim 1 , wherein in the step (d1), the first film is formed in a non-oxidizing atmosphere.

3. The method according to claim 2 , wherein the first film includes one of Al 2 O 3 , SiO 2 , SiN, and AlN.

4. The method according to claim 3 , wherein the second film includes one of Al 2 O 3 , SiO 2 , SiN, and AlN.

5. The method according to claim 4 , wherein the second film has a hydrogen (H) content of 1×10 18 /cm 3 or more.

6. The method according to claim 5 , wherein the first film has a hydrogen (H) content of 1×10 17 /cm 3 or less.

7. The method according to claim 6 , wherein the first film has a thickness of 10 nm or less.

8. A method of manufacturing a semiconductor device, the method comprising the steps of:

(a) forming a second nitride semiconductor layer on a first nitride semiconductor layer;

(b) forming a third nitride semiconductor layer on the second nitride semiconductor layer;

(c) forming a trench that penetrates the third nitride semiconductor layer and reaches the middle of the second nitride semiconductor layer;

(d) forming a gate insulating film within the trench; and

(e) forming a gate electrode on the gate insulating film;

wherein the second nitride semiconductor layer has an electron affinity equal to or larger than electron affinity of the first nitride semiconductor layer,

wherein the third nitride semiconductor layer has an electron affinity smaller than the electron affinity of the first nitride semiconductor layer, and

wherein the step (d) includes the steps of:

(d1) forming a first film including a first insulator within the trench by a sputtering process using a target including the first insulator; and

(d2) forming a second film including a second insulator on the first film by a CVD process.

9. The method according to claim 8 , wherein in the step (d1), the first film is formed in a non-oxidizing atmosphere.

10. The method according to claim 9 , wherein the first film includes one of Al 2 O 3 , SiO 2 , SiN, and AlN.

11. The method according to claim 10 , wherein the second film includes one of Al 2 O 3 , SiO 2 , SiN, and AlN.

12. The method according to claim 11 , wherein the second film has a hydrogen (H) content of 1×10 18 /cm 3 or more.

13. The method according to claim 12 , wherein the first film has a hydrogen (H) content of 1×10 17 /cm 3 or less.

14. The method according to claim 13 , wherein the first film has a thickness of 10 nm or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2018
From: MIYAMOTO, HIRONOBU; NAKAYAMA, TATSUO; OKAMOTO, YASUHIRO; TSUBOI, ATSUSHI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 045671/0751 →
Priority Claims (1)
JP 2017-104177 · May 26, 2017 · national
Continuity (1)
Related Publication 20180342589A1 · Nov 29, 2018