IP Library › Granted Patent US 10,461,197
Granted Patent B2
US 10,461,197 · App. 15/602,299 · Granted Oct 29, 2019

Sputtering target, oxide semiconductor, oxynitride semiconductor, and transistor

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869C23C14/0676C23C14/08C23C14/086C23C14/3414H01L21/02554H01L21/02565H01L21/02631H01L29/24H01L29/4908H01L29/518H01L29/66969
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Quick Facts
Patent No.
US 10,461,197
App. No.
15/602,299
Granted
Oct 29, 2019
Kind
B2
Abstract

A novel oxide semiconductor, a novel oxynitride semiconductor, a transistor including them, or a novel sputtering target is provided. A composite target includes a first region and a second region. The first region includes an insulating material and the second region includes a conductive material. The first region and the second region each include a microcrystal whose diameter is greater than or equal to 0.5 nm and less than or equal to 3 nm or a value in the neighborhood thereof. A semiconductor film is formed using the composite target.

Claims (57)

1. A semiconductor device comprising:

an oxynitride semiconductor layer comprising:

a plurality of first regions; and

a second region,

wherein each region of the plurality of first regions comprises an element M,

wherein the element M is one or more of Al, Si, Y, B, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu,

wherein each region of the plurality of first regions comprises an insulating material as a first main component,

wherein the second region comprises a conductive material as a second main component,

wherein the second region comprises indium,

wherein each region of the plurality of first regions is surrounded by the second region in plan view, and

wherein the plurality of first regions and the second region are arranged in a mosaic pattern.

2. The semiconductor device according to claim 1 , further comprising:

a third region,

wherein the element M is aluminum,

wherein the first main component is aluminum oxynitride or aluminum zinc oxynitride,

wherein the second main component is indium oxynitride or indium zinc oxynitride, and

wherein the third region comprises zinc oxynitride as a third main component.

3. The semiconductor device according to claim 1 , further comprising:

a third region,

wherein the element M is silicon,

wherein the first main component is silicon oxynitride or silicon zinc oxynitride,

wherein the second main component is indium oxynitride or indium zinc oxynitride, and

wherein the third region comprises zinc oxynitride as a third main component.

4. The semiconductor device according to claim 2 ,

wherein a surrounding portion of the plurality of first regions, the second region, or the third region is blurred, and

wherein the plurality of first regions, the second region, and the third region form a cloud-like composition.

5. The semiconductor device according to claim 1 ,

wherein a diameter of one first region of the plurality of first regions is greater than or equal to 1 nm and less than or equal to 2 nm.

6. The semiconductor device according to claim 1 , further comprising zinc,

wherein an atomic ratio of indium to the element M and zinc in the oxynitride semiconductor layer is 4:2:3, 5:1:6, 1:1:1, a neighborhood of 4:2:3, a neighborhood of 5:1:6, or a neighborhood of 1:1:1.

7. The semiconductor device according to claim 1 , further comprising a transistor comprising the oxynitride semiconductor layer.

8. The semiconductor device according to claim 7 ,

wherein the transistor comprises a gate insulating film in contact with the oxynitride semiconductor layer, and

wherein the gate insulating film comprises silicon nitride.

9. The semiconductor device according to claim 1 ,

wherein a diameter of one first region of the plurality of first regions is greater than or equal to 1 nm and less than or equal to 2 nm.

10. An oxide semiconductor device comprising:

an oxide semiconductor layer comprising:

a plurality of first regions; and

a second region,

wherein each region of the plurality of first regions comprises an element M,

wherein the element M is one or more of Al, Si, Y, B, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu,

wherein each region of the plurality of first regions comprises an insulating material as a first main component,

wherein the second region comprises a conductive material as a second main component,

wherein the second region comprises indium,

wherein each region of the plurality of first regions is surrounded by the second region in plan view, and

wherein the plurality of first regions and the second region are arranged in a mosaic pattern.

11. A semiconductor device comprising:

an oxide semiconductor layer comprising:

a plurality of first regions; and

a second region,

wherein each region of the plurality of first regions comprises gallium,

wherein each region of the plurality of first regions comprises an insulating material as a first main component,

wherein the second region comprises a conductive material as a second main component,

wherein the second region comprises indium,

wherein each region of the plurality of first regions is surrounded by the second region in plan view, and

wherein the plurality of first regions and the second region are arranged in a mosaic pattern.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 043005/0014 →
Priority Claims (2)
JP 2016-112153 · Jun 3, 2016 · national
JP 2016-113026 · Jun 6, 2016 · national
Continuity (1)
Related Publication 20170352763A1 · Dec 7, 2017
Cited By (2)
US 12,315,717 US 12,512,051