Methods of forming replacement gate structures on transistor devices

1. A method, comprising:

forming a continuous line-type sacrificial gate structure above a semiconductor substrate by performing a method that comprises:

forming a sacrificial gate insulation layer above said semiconductor substrate;

forming a first sacrificial gate electrode material layer above said sacrificial gate insulation layer; and

forming a second sacrificial gate electrode material layer above said first sacrificial gate electrode material layer;

after forming said continuous line-type sacrificial gate structure, removing a portion of said second sacrificial gate electrode material layer and removing a portion of said first sacrificial gate electrode material layer so as to thereby form a first opening positioned above said sacrificial gate insulation layer, wherein said first opening extends through an entirety of said second sacrificial gate electrode material layer of said continuous line-type sacrificial gate structure and at least partially through said first sacrificial gate electrode material layer of said continuous line-type sacrificial gate structure;

forming an insulating gate separation structure in said first opening;

removing materials of said sacrificial gate structure on opposite sides of said insulating gate separation structure to form first and second replacement gate cavities on said opposite sides of said insulating gate separation structure; and

forming first and second replacement gate structures in said first and second replacement gate cavities, respectively.

2. The method of claim 1 , wherein said first and second replacement gate structures comprise a same material.

3. The method of claim 1 , wherein removing said portion of said second sacrificial gate electrode material layer and removing said portion of said first sacrificial gate electrode material layer comprises:

performing a first etching process to selectively remove said portion of said second sacrificial gate electrode material layer selectively relative to said first sacrificial gate electrode material layer to form a second layer opening that extends through an entirety of said second sacrificial gate electrode material layer and exposes an upper surface of said first sacrificial gate electrode material layer; and

performing a second etching process to selectively remove said portion of said first sacrificial gate electrode material layer selectively relative to said sacrificial gate insulation layer to form a first layer opening that extends through an entirety of said first sacrificial gate electrode material layer and exposes an upper surface of said sacrificial gate insulation layer.

4. The method of claim 3 , wherein performing said second etching process comprises performing an isotropic etching process such that a portion of said first layer opening extends under a portion of said second sacrificial gate electrode material layer, and wherein said insulating gate separation structure has an inverted T-shaped configuration.

5. The method of claim 3 , wherein performing said second etching process comprises performing an anisotropic etching process such that said first layer opening does not extend under a portion of said second sacrificial gate electrode layer, and wherein said insulating gate separation structure has an substantially uniform width from a top of said insulating gate separation structure to a bottom of said insulating gate separation structure.

6. The method of claim 1 , wherein removing said portion of said second sacrificial gate electrode material layer and removing said portion of said first sacrificial gate electrode material layer comprises:

performing a first etching process to selectively remove said portion of said second sacrificial gate electrode material layer selectively relative to said first sacrificial gate electrode material layer to form a second layer opening that extends through an entirety of said second sacrificial gate electrode material layer and exposes an upper surface of said first sacrificial gate electrode material layer; and

performing a second etching process to selectively remove said portion of said first sacrificial gate electrode material layer so as to form a first layer recess within said first sacrificial gate electrode layer, said first layer recess extending only partially through said first sacrificial gate electrode material layer; and

forming an internal sidewall spacer within said second layer opening and said first layer recess, said internal sidewall spacer covering sidewall surfaces of said second layer opening and said first layer recess and exposing a bottom surface of said first layer recess.

7. The method of claim 6 , further comprising performing an isotropic etching process on said exposed bottom surface of said first layer recess formed in said first sacrificial gate electrode material layer so as to form a first layer opening that extends through said first sacrificial gate electrode material layer and exposes an upper surface of said sacrificial gate insulation layer, wherein said first layer opening extends under at least a portion of said internal sidewall spacer and wherein said insulating gate separation structure has an inverted T-shaped configuration.

8. The method of claim 6 , further comprising performing an anisotropic etching process on said exposed bottom surface of said first layer recess formed in said first sacrificial gate electrode material layer and exposes an upper surface of said sacrificial gate insulation layer, wherein said first layer opening does not extend under said internal sidewall spacer, and wherein said insulating gate separation structure has a substantially uniform width from a top of said insulating gate separation structure to a bottom of said insulating gate separation structure.

9. The method of claim 1 , wherein said insulating gate separation structure is formed in direct contact with an upper surface of said sacrificial gate insulation layer positioned below said first opening.

10. The method of claim 1 , wherein forming said continuous line-type sacrificial gate structure further comprises:

forming a gate cap material layer above said second sacrificial gate electrode material layer;

patterning said gate cap material layer, said patterned gate cap material layer defining a size and position of said continuous line-type sacrificial gate structure; and

performing one or more etching processes to define said continuous line-type sacrificial gate structure using said patterned gate cap material layer as an etch mask.

11. The method of claim 1 , further comprising, prior to forming said first opening, forming a sidewall spacer on said continuous line-type sacrificial gate structure.