Devices including gate spacer with gap or void and methods of forming the same
Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.
1. A semiconductor device comprising:
an isolation region surrounding a semiconductor fin;
an interlayer dielectric extending away from the isolation region in a first direction;
a first dielectric material extending away from the isolation region in the first direction, the first dielectric material being separated from the interlayer dielectric by an etch stop layer;
a second dielectric material over the first dielectric material, the second dielectric material being separated from the interlayer dielectric by the etch stop layer;
a void located within the second dielectric material; and
a gate located over the semiconductor fin and being located on an opposite side of the void from the interlayer dielectric.
2. The semiconductor device of claim 1 , wherein the first dielectric material comprises aluminum oxide.
3. The semiconductor device of claim 2 , wherein the second dielectric material comprises silicon carbon oxynitride.
4. The semiconductor device of claim 2 , wherein the second dielectric material comprises silicon oxycarbide.
5. The semiconductor device of claim 1 , a contact in physical contact with the second dielectric material, wherein a surface of the contact facing the second dielectric material is straight.
6. The semiconductor device of claim 1 , wherein the second dielectric material encapsulates the void.
7. The semiconductor device of claim 1 , wherein the void encircles the gate.
8. A semiconductor device comprising:
a void encircling a first region over a semiconductor fin;
a gate electrode located within the first region and over the semiconductor fin;
a contact located on an opposite side of the void from the first region, the contact having a straight sidewall; and
a first dielectric material separating the void from the contact, wherein at least a portion of an interface between the first dielectric material and the contact is straight.
9. The semiconductor device of claim 8 , further comprising a second dielectric material between the void and the gate electrode.
10. The semiconductor device of claim 8 , further comprising:
an isolation region encircling the semiconductor fin; and
aluminum oxide separating the isolation region from the void.
11. The semiconductor device of claim 8 , wherein the first dielectric material encapsulates the void.
12. The semiconductor device of claim 8 , wherein the first dielectric material has a straight sidewall facing the void.
13. The semiconductor device of claim 8 , further comprising a cap layer adjacent to the first dielectric material and overlying the void.
14. The semiconductor device of claim 13 , further comprising a second dielectric material adjacent to the cap layer and extending along the void.
15. A semiconductor device comprising:
a dielectric cap over a gate electrode, the gate electrode being located over a semiconductor fin;
a dielectric spacer extending between the dielectric cap and a contact to a source/drain region; and
a void located between the semiconductor fin and at least a portion of the dielectric spacer.
16. The semiconductor device of claim 15 , wherein the dielectric spacer comprises:
a first spacer;
a cap layer; and
a second spacer.
17. The semiconductor device of claim 16 , wherein the first spacer extends along a first side of the void.
18. The semiconductor device of claim 17 , wherein the second spacer extends along a second side of the void opposite the first side of the void.
19. The semiconductor device of claim 15 , further comprising a dielectric material extending between the dielectric spacer and an isolation region, the isolation region encircling the semiconductor fin.
20. The semiconductor device of claim 19 , wherein the dielectric material comprises aluminum oxide.