Integrated fan-out packages and methods of forming the same

1. A method of forming a semiconductor device, the method comprising:

attaching a metal foil to a carrier, the metal foil being pre-made prior to attaching the metal foil;

forming a conductive pillar on a first side of the metal foil distal to the carrier;

attaching a semiconductor die to the first side of the metal foil;

after attaching the semiconductor die, performing an etching process, wherein the etching process reduces a width of the conductive pillar, wherein the etching process removes a portion of the metal foil disposed laterally between the conductive pillar and the semiconductor die, and wherein a remaining portion of the metal foil disposed between the semiconductor die and the carrier has a width that is smaller than a width of the semiconductor die;

after performing the etching process, forming a molding material around the semiconductor die and the conductive pillar; and

forming a redistribution structure over the molding material.

2. The method of claim 1 , wherein the etching process is a wet etch process.

3. The method of claim 1 , wherein attaching the metal foil comprise attaching the metal foil to the carrier using an adhesive layer, wherein the method further comprises removing the carrier after forming the redistribution structure to expose the adhesive layer.

4. The method of claim 3 , where the method further comprises:

removing the adhesive layer after removing the carrier, wherein after removing the adhesive layer, an upper surface of the conductive pillar distal to the redistribution structure and an upper surface of the molding material distal to the redistribution structure are exposed; and

bonding a semiconductor package to the upper surface of the conductive pillar.

5. The method of claim 3 , further comprising:

after removing the carrier, forming an opening in the adhesive layer, the opening exposing an upper surface of the conductive pillar distal to the redistribution structure; and

bonding a semiconductor package to the conductive pillar.

6. The method of claim 1 , further comprising forming a dielectric layer over the carrier before attaching the metal foil, the metal foil being attached to the dielectric layer.

7. The method of claim 1 , wherein attaching the semiconductor die comprises attaching the semiconductor die to the first side of the metal foil using a dielectric layer, wherein the dielectric layer has a thermal conductivity between about 0.2 watts per meter-kelvin (W/(m−k)) to about 10 W/(m−k).

8. The method of claim 1 , wherein the etching process reduces the width of the conductive pillar by about 20 μm to about 60 μm.

9. The method of claim 1 , wherein a material of the metal foil has a thermal conductivity between about 100 watts per meter-kelvin (W/(m−k)) and about 400 W/(m−k).

10. A method of forming a semiconductor device, the method comprising:

attaching a pre-formed metal film to a carrier;

attaching a die to a first side of the pre-formed metal film distal to the carrier;

performing an etching process to remove a first portion of the pre-formed metal film disposed beyond lateral extents of the die, wherein after the etching process, a second portion of the pre-formed metal film remains within the lateral extents of the die, wherein a sidewall of the second portion of the pre-formed metal film is misaligned with a respective sidewall of the die;

forming a molding material over the carrier and around the die after the etching process; and

forming a redistribution structure over the die and the molding material.

11. The method of claim 10 , further comprising forming external connectors at a first side of the redistribution structure facing away from the molding material.

12. The method of claim 10 , wherein performing the etching process comprises performing a wet etch process using an etchant that is selective to the pre-formed metal film.

13. The method of claim 10 , further comprising, before performing the etching process, forming a metal pillar over the pre-formed metal film.

14. The method of claim 13 , wherein the etching process reduces a width of the metal pillar.

15. The method of claim 13 , wherein the pre-formed metal film and the metal pillar are formed of a same material.

16. The method of claim 13 , further comprising:

removing the carrier;

exposing an end surface of the metal pillar; and

bonding a semiconductor package to the end surface of the metal pillar.

17. A method of forming a semiconductor device, the method comprising:

attaching a metal foil to a carrier using an adhesive layer, wherein the metal foil is pre-made before being attached to the carrier;

forming a metal pillar on a first surface of the metal foil facing away from the carrier;

attaching a die to the first surface of the metal foil;

reducing a height and a width of the metal pillar using an etching process after attaching the die, wherein the etching process removes portions of the metal foil and exposes an upper surface of the adhesive layer, wherein after the etching process, a remaining portion of the metal foil is disposed between the die and the adhesive layer, wherein a first distance between opposing sidewalls of the remaining portion of the metal foil is smaller than a second distance between opposing sidewalls of the die; and

forming a molding material over the upper surface of the adhesive layer, wherein the molding material surrounds the metal pillar and the die.

18. The method of claim 17 , further comprising:

forming a redistribution structure over the molding material, wherein a conductive feature of the redistribution structure is electrically coupled to the metal pillar; and

forming connectors on a first side of the redistribution structure facing away from the molding material.

19. The method of claim 17 , wherein the metal foil is formed of a material having a thermal conductivity between about 100 watts per meter-kelvin (W/(m−k)) and about 400 W/(m−k).

20. The method of claim 17 , wherein an offset between a sidewall of the remaining portion of the metal foil and a respective sidewall of the die is between about 10 μm and about 30 μm.