Method for preventing bottom layer wrinkling in a semiconductor device
A method for manufacturing a semiconductor device includes forming a first insulating film over a semiconductor substrate and forming a second insulating film on the first insulating film. The first insulating film is a tensile film having a first tensile stress and the second insulating film is either a tensile film having a second tensile stress that is less than the first tensile stress or a compressive film. The first insulating film and second insulating film are formed of a same material. A metal hard mask layer is formed on the second insulating film.
1. A method for manufacturing a semiconductor device, comprising:
forming a bottom organic layer on a semiconductor substrate;
forming a first insulating film over the bottom organic layer at a first plasma power condition;
forming a second insulating film of a same material as the first insulating film on the first insulating film at a second plasma power condition higher than the first plasma power condition;
forming a metal hard mask layer on the second insulating film; and
completely removing the bottom organic layer after forming the metal hard mask layer,
wherein the first insulating film and second insulating film are formed at a temperature of about 100° C. to about 200° C.
2. The method according to claim 1 , wherein the first insulating film and second insulating film are oxide films.
3. The method according to claim 2 , wherein the first insulating film and second insulating film comprise silicon oxide.
4. The method according to claim 1 , further comprising forming a third insulating film on the metal hard mask layer.
5. The method according to claim 1 , further comprising patterning the first insulating film, second insulating film, and metal hard mask layer.
6. The method according to claim 5 , wherein the first insulating film, second insulating film, and metal hard mask layer are patterned by etching.
7. The method according to claim 1 , wherein the first plasma power condition ranges from about 50 W to about 500 W, and the second plasma power condition ranges from about 550 W to about 800 W.
8. The method according to claim 1 , wherein the metal hard mask comprises titanium nitride.
9. A method for manufacturing a semiconductor device, comprising:
forming an anti-reflective bottom organic layer on a semiconductor substrate,
wherein the anti-reflective bottom organic layer comprises a carbon backbone polymer or monomers;
forming a first insulating film having a first tensile stress over the bottom organic layer at a first plasma power condition;
forming a second insulating film of a same material as the first insulating film and having a second tensile stress less than the first tensile stress on the first insulating film at a second plasma power condition higher than the first plasma power condition;
forming a metal hard mask layer on the second insulating film;
forming a third insulating film on the metal hard mask layer;
completely removing the bottom organic layer after forming the metal hard mask layer; and
removing the metal hard mask layer,
wherein the first, second, and third insulating films are formed at a temperature of about 100° C. to about 200° C.
10. The method according to claim 9 , wherein the first, second, and third insulating films comprise an oxide.
11. The method according to claim 10 , wherein the first, second, and third insulating films comprise silicon oxide.
12. The method according to claim 9 , wherein the first and third insulating films have a thickness ranging from about 10 nm to about 50 nm, and the second insulating film has a thickness ranging from about 100 nm to about 500 nm.
13. The method according to claim 9 , wherein the metal hard mask comprises titanium nitride.
14. A method for manufacturing a semiconductor device, comprising:
forming an anti-reflective bottom organic layer on a semiconductor substrate,
wherein the anti-reflective bottom organic layer is used for patterning and the anti-reflective bottom organic layer comprises a carbon backbone polymer or monomers;
forming a first insulating film over the bottom organic layer at a first plasma power condition, wherein the first plasma power condition ranges from about 50 W to about 500 W;
forming a second insulating film of a same material as the first insulating film directly on the first insulating film at a second plasma condition, wherein the second plasma power condition ranges from about 550 W to about 1000 W;
forming a metal hard mask layer on the second insulating film;
forming a third insulating film on the metal hard mask layer;
forming a layer of organic material on the third insulating layer;
forming a silicon containing layer directly on the layer of organic material; and
forming a photoresist directly on the silicon containing layer.
15. The method according to claim 14 , wherein the first, second, and third insulating films are formed at a temperature of about 100° C. to about 200° C.
16. The method according to claim 14 , wherein the first, second, and third insulating films comprise silicon oxide.
17. The method according to claim 14 , wherein the first and third insulating films have a thickness ranging from about 10 nm to about 50 nm, and the second insulating film has a thickness ranging from about 100 nm to about 500 nm.
18. The method according to claim 14 , wherein the metal hard mask comprises titanium nitride.
19. The method according to claim 14 , wherein the first insulating film has a tensile stress ranging from about 75 MPa to about 25 MPa, and the second insulating film has a tensile stress ranging from about 20 MPa to about −50 MPa.
20. The method according to claim 14 , further comprising completely removing the first insulating film and the second insulating film.