IP Library › Granted Patent US 10,522,568
Granted Patent B2
US 10,522,568 · App. 16/191,952 · Granted Dec 31, 2019

Semiconductor device and method for manufacturing the same

Inventors: Shunpei Yamazaki (Setagaya, JP); Masayuki Sakakura (Tochigi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225H01L21/02565H01L27/124H01L27/1248H01L27/1255H01L29/66969H01L29/7869H01L33/42H01L21/02554H01L2924/0002
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Quick Facts
Patent No.
US 10,522,568
App. No.
16/191,952
Granted
Dec 31, 2019
Kind
B2
Abstract

It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.

Claims (75)

1. A liquid crystal display panel comprising:

a substrate;

a pixel portion over the substrate, the pixel portion comprising:

a pixel, the pixel comprising:

a gate electrode layer in contact with the substrate;

a first insulating layer over the gate electrode layer;

a semiconductor layer over the first insulating layer;

a source electrode layer and a drain electrode layer over the semiconductor layer;

a second insulating layer over the source electrode layer and the drain electrode layer; and

an electrode layer over the second insulating layer;

a terminal portion over the substrate, the terminal portion comprising:

a first conductive layer in contact with the substrate;

the first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

the second insulating layer over the second conductive layer; and

a third conductive layer over the second insulating layer,

wherein the third conductive layer is electrically connected to the first conductive layer and the second conductive layer,

wherein the third conductive layer is in contact with a top surface of the second conductive layer in an opening in the second insulating layer,

wherein the third conductive layer is in contact with no side surface of the second conductive layer,

wherein the gate electrode layer and the first conductive layer comprise the same material,

wherein the source electrode layer, the drain electrode layer and the second conductive layer are over and in contact with the first insulating layer and comprise the same material, and

wherein the electrode layer and the third conductive layer comprise the same material having a light transmitting property.

2. The liquid crystal display panel according to claim 1 ,

wherein the pixel portion further comprises a source wiring and a gate wiring,

wherein the source electrode layer is part of the source wiring,

wherein the gate electrode layer is part of the gate wiring, and

wherein the electrode layer overlaps with the source wiring and the gate wiring in a top view.

3. The liquid crystal display panel according to claim 1 ,

wherein the terminal portion is configured to be electrically connected to an FPC.

4. The liquid crystal display panel according to claim 1 ,

wherein an end portion of the drain electrode layer is surrounded by a U-shaped portion of the source electrode layer in a top view.

5. The liquid crystal display panel according to claim 1 ,

wherein the liquid crystal display panel is a horizontal electric field mode liquid crystal panel.

6. The liquid crystal display panel according to claim 1 ,

wherein the third conductive layer is in contact with the first conductive layer.

7. An electronic device comprising the liquid crystal display panel according to claim 1 , and an FPC connected to the terminal portion.

8. A liquid crystal display panel comprising:

a substrate;

a pixel portion over the substrate, the pixel portion comprising:

a pixel, the pixel comprising:

a gate electrode layer in contact with the substrate;

a first insulating layer over the gate electrode layer;

a semiconductor layer over the first insulating layer;

a source electrode layer and a drain electrode layer over the semiconductor layer;

a second insulating layer over the source electrode layer and the drain electrode layer; and

an electrode layer over the second insulating layer;

a terminal portion over the substrate, the terminal portion comprising:

a first conductive layer in contact with the substrate;

the first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

the second insulating layer over the second conductive layer; and

a third conductive layer over the second insulating layer,

wherein the first insulating layer comprises a first opening and the second insulating layer comprises a second opening,

wherein the third conductive layer is electrically connected to the first conductive layer and the second conductive layer through the first opening and the second opening,

wherein the third conductive layer is in contact with a top surface of the second conductive layer in the second opening,

wherein an edge of the first opening is outside an area overlapping with the second opening,

wherein the gate electrode layer and the first conductive layer comprise the same material,

wherein the source electrode layer, the drain electrode layer and the second conductive layer are over and in contact with the first insulating layer and comprise the same material, and

wherein the electrode layer and the third conductive layer comprise the same material having a light transmitting property.

9. The liquid crystal display panel according to claim 8 ,

wherein the pixel portion further comprises a source wiring and a gate wiring,

wherein the source electrode layer is part of the source wiring,

wherein the gate electrode layer is part of the gate wiring, and

wherein the electrode layer overlaps with the source wiring and the gate wiring in a top view.

10. The liquid crystal display panel according to claim 8 ,

wherein the terminal portion is configured to be electrically connected to an FPC.

11. The liquid crystal display panel according to claim 8 ,

wherein an end portion of the drain electrode layer is surrounded by a U-shaped portion of the source electrode layer in a top view.

12. The liquid crystal display panel according to claim 8 ,

wherein the liquid crystal display panel is a horizontal electric field mode liquid crystal panel.

13. The liquid crystal display panel according to claim 8 ,

wherein the third conductive layer is in contact with the first conductive layer.

14. An electronic device comprising the liquid crystal display panel according to claim 8 , and an FPC connected to the terminal portion.

15. The liquid crystal display panel according to claim 8 ,

wherein the third conductive layer is in contact with no side surface of the second conductive layer.

Priority Claims (1)
JP 2009-164265 · Jul 10, 2009 · national
Continuity (8)
Continuation 15695162 · Sep 5, 2017
Continuation 15342373 · Nov 3, 2016
Continuation 14730259 · Jun 4, 2015
Continuation 14486187 · Sep 15, 2014
Continuation 13856590 · Apr 4, 2013
Continuation 13658201 · Oct 23, 2012
Continuation 12832334 · Jul 8, 2010
Related Publication 20190088687A1 · Mar 21, 2019
Cited By (2)
US 12,230,715 US 12,376,335