Field-effect transistor and method therefor
A transistor includes a trench formed in a semiconductor substrate with the trench having a first sidewall and a second sidewall. A vertical field plate is formed in the trench and the vertical field plate is located between the first sidewall and the second sidewall. A gate electrode is formed in the trench with a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate. A first dielectric material is formed in the trench between the first sidewall and the vertical field plate. A second dielectric material is formed in the trench between the vertical field plate and the second sidewall with the second dielectric material having a dielectric constant lower than that of the first dielectric material.
1. A transistor comprising:
a trench formed in a semiconductor substrate, the trench having a first sidewall and a second sidewall;
a vertical field plate formed in the trench, the vertical field plate located between the first sidewall and the second sidewall;
a gate electrode formed in the trench, a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate;
a first dielectric material formed in the trench between the first sidewall and the vertical field plate; and
a second dielectric material formed in the trench between the vertical field plate and the second sidewall, the second dielectric material having a dielectric constant lower than that of the first dielectric material;
wherein the second dielectric material comprises a first portion having a first dielectric constant and a second portion having a second dielectric constant different from the first dielectric constant.
2. A transistor comprising:
a trench formed in a semiconductor substrate, the trench having a first sidewall and a second sidewall;
a vertical field plate formed in the trench, the vertical field plate located between the first sidewall and the second sidewall;
a gate electrode formed in the trench, a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate;
a first dielectric material formed in the trench between the first sidewall and the vertical field plate; and
a second dielectric material formed in the trench between the vertical field plate and the second sidewall, the second dielectric material having a dielectric constant lower than that of the first dielectric material;
wherein the gate electrode is configured to receive a first voltage signal;
wherein the vertical field plate is coupled to the gate electrode and configured to receive the first voltage signal.
3. A transistor comprising:
a trench formed in a semiconductor substrate, the trench having a first sidewall and a second sidewall;
a vertical field plate formed in the trench, the vertical field plate located between the first sidewall and the second sidewall;
a gate dielectric formed on at least a portion of the first sidewall in the trench;
a gate electrode formed in the trench, a first edge of the gate electrode adjacent to gate dielectric and a second edge of the gate electrode proximate to the vertical field plate;
a first dielectric material formed in the trench between the first sidewall and the vertical field plate;
a second dielectric material formed in the trench between the vertical field plate and the second sidewall, the second dielectric material having a dielectric constant lower than that of the first dielectric material;
a contact region connected to the gate electrode and vertical field plate, the contact region configured to receive a voltage signal.
4. A transistor comprising:
a trench formed in a semiconductor substrate, the trench having a first sidewall and a second sidewall;
a vertical field plate formed in the trench, the vertical field plate located between the first sidewall and the second sidewall;
a gate electrode formed in the trench, a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate;
a first dielectric material formed in the trench between the first sidewall and the vertical field plate; and
a second dielectric material formed in the trench between the vertical field plate and the second sidewall, the second dielectric material having a dielectric constant lower than that of the first dielectric material;
wherein the first dielectric material has a first thickness between the first sidewall and the vertical field plate and the second dielectric material has a second thickness between the vertical field plate and the second sidewall, the first thickness substantially the same as the second thickness.
5. The transistor of claim 1 , wherein the second dielectric material is characterized as a low-K dielectric material.
6. The transistor of claim 2 , wherein the second dielectric material comprises a first portion having a first dielectric constant and a second portion having a second dielectric constant different from the first dielectric constant.
7. The transistor of claim 1 , further comprising a source region formed in the semiconductor substrate having at least a portion of the source region adjacent to the first sidewall, and a drain region formed in the semiconductor substrate having at least a portion of the drain region adjacent to the second sidewall.
8. The transistor of claim 7 , further comprising a body region formed in the semiconductor substrate having at least a portion of the body region adjacent to the first sidewall, the source region formed in the body region.
9. The transistor of claim 1 , wherein the first dielectric material has a first thickness between the first sidewall and the vertical field plate and the second dielectric material has a second thickness between the vertical field plate and the second sidewall, the first thickness substantially the same as the second thickness.
10. The transistor of claim 1 , wherein a portion of the first dielectric extends between a bottom edge of the vertical field plate and a bottom surface of the trench.
11. The transistor of claim 1 , wherein the gate electrode is configured to receive a first voltage signal.
12. The transistor of claim 11 , wherein the vertical field plate is configured to receive a second voltage signal, the second voltage signal different from the first voltage signal.
13. The transistor of claim 3 , wherein the second dielectric material formed in the trench comprises a low-K dielectric material.
14. The transistor of claim 3 , further comprising a source region formed in the semiconductor substrate having at least a portion of the source region adjacent to the first sidewall, and a drain region formed in the semiconductor substrate having at least a portion of the drain region adjacent to the second sidewall.