Semiconductor device including metal-2 dimensional material-semiconductor contact

1. A semiconductor device comprising: a substrate, an insulation layer disposed on an upper surface of the substrate, a semiconductor layer, including a well region doped to a first conductivity type, disposed on an upper surface of the insulation layer, and a source region and a drain region doped to a second conductivity type electrically opposite the first conductivity type; a metal layer electrically contacting the semiconductor layer; and a two-dimensional material layer between the semiconductor layer and the metal layer, the two-dimensional material layer having a two-dimensional crystal structure, the two-dimensional layer being patterned in one of a plurality of nanowires, a plurality of nano-slits, and a plurality of nano-dots, the two-dimensional material layer including, a first two-dimensional material layer on the source region, the metal layer including a source electrode on the first two-dimensional material layer, and a second two-dimensional material layer on the drain region, the metal layer including a drain electrode on the second two-dimensional material layer; a gate insulating film on the well region between the source region and the drain region; a gate electrode on the gate insulating film; and the first two-dimensional material layer and the second two-dimensional material layer contact sides of the gate insulating film; and parts of the upper surfaces of the first two-dimensional material layer and the second two-dimensional material layer next to the gate insulating film are exposed.

2. The semiconductor device of claim 1 , wherein the two-dimensional material layer includes a carbon-based 2D material.

3. The semiconductor device of claim 2 , wherein the carbon-based 2D material is at least one of graphene and nano crystalline graphene (nc-G).

4. The semiconductor device of claim 1 , wherein the two-dimensional material layer includes a transition metal dichalcogenide.

5. The semiconductor device of claim 4 , wherein the transition metal dichalcogenide includes at least one of MoS 2 , WS 2 , TaS 2 , HfS 2 , ReS 2 , TiS 2 , NbS 2 , SnS 2 , MoSe 2 , WSe 2 , TaSe 2 , HfSe 2 , ReSe 2 , TiSe 2 , NbSe 2 , SnSe 2 , MoTe 2 , WTe 2 , TaTe 2 , HfTe 2 , ReTe 2 , TiTe 2 , NbTe 2 , P and SnTe 2 .

6. The semiconductor device of claim 1 , wherein the two-dimensional material layer includes at least one of TiO x , NbO x , MnO x , VaO x , MnO 3 , TaO 3 , WO 3 , MoCl 2 , CrCl 3 , RuCl 3 , BiI 3 , PbCl 4 , GeS, GaS, GeSe, GaSe, PtSe 2 , In 2 Se 3 , GaTe, InS, InSe, InTe, hexagonal BN (h-BN), and phosphorene.

7. The semiconductor device of claim 1 , wherein the two-dimensional material layer has a doped structure obtained by one of replacing some elements of the two-dimensional crystal structure with other elements and combining other elements to the two-dimensional crystal structure.

8. The semiconductor device of claim 1 , wherein a thickness of the two-dimensional material layer is such that a contact resistivity between the semiconductor layer and the metal layer is equal to or less than 10 −7 Ω/cm 2 .

9. The semiconductor device of claim 8 , wherein the thickness of the two-dimensional material layer is within a range of about 0.3 nm to about 5 nm.

10. The semiconductor device of claim 8 , wherein

the two-dimensional material layer includes multiple layers of a single-layer two-dimensional crystal structure having a thickness T 1 ; and

the total thickness TD of the two-dimensional material layer is a sum of each of the thicknesses T 1 of the single-layer two-dimensional crystal structures.

11. The semiconductor device of claim 1 , wherein a surface of the semiconductor layer contacting the two-dimensional material layer is surface-treated with monolayer atoms.

12. The semiconductor device of claim 1 , wherein the metal layer includes a metal material and the semiconductor layer includes a semiconductor material, further comprising:

a mixture layer between the two-dimensional material layer and the metal layer, the mixture layer including the metal material and the semiconductor material.

13. The semiconductor device of claim 1 , wherein each of the source region and the drain region has a doping concentration that is equal to or higher than 10 19 /cm 3 .

14. The semiconductor device of claim 1 , wherein a part of the source region directly contacts the source electrode.