IP Library › Granted Patent US 10,566,183
Granted Patent B2
US 10,566,183 · App. 16/052,929 · Granted Feb 18, 2020

Method of manufacturing semiconductor device and the semiconductor device

Inventors: Yasuhiro Okamoto (Ibaraki, JP); Takashi Ide (Ibaraki, JP)
Assignee: Renesas Electronics Corporation
H01L21/02164H01L21/022H01L21/0228H01L21/02178H01L21/02271H01L21/02356H01L29/513H01L29/66462H01L29/778H01L29/7783H01L29/2003H01L29/41758H01L29/4236H01L29/42376H01L29/432
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Quick Facts
Patent No.
US 10,566,183
App. No.
16/052,929
Granted
Feb 18, 2020
Kind
B2
Abstract

Characteristics of a semiconductor device are improved. A method of manufacturing a semiconductor device of the invention includes a step of forming a gate insulating film over a nitride semiconductor layer. The step includes steps of forming a crystalline Al 2 O 3 film on the nitride semiconductor layer, forming a SiO 2 film on the Al 2 O 3 film, and forming an amorphous Al 2 O 3 film on the SiO 2 film. The step further includes steps of performing heat treatment on the amorphous Al 2 O 3 to crystallize the amorphous Al 2 O 3 , thereby forming a crystalline Al 2 O 3 film, and forming a SiO 2 film on the crystalline Al 2 O 3 film. In this way, since a film stack, which is formed by alternately stacking the crystalline Al 2 O 3 films and the SiO 2 films from a bottom side, is used as the gate insulating film, threshold voltage can be cumulatively increased.

Claims (29)

1. A method of manufacturing a semiconductor device, comprising the steps of:

(a) forming a second nitride semiconductor layer over a first nitride semiconductor layer;

(b) forming a third nitride semiconductor layer over the second nitride semiconductor layer;

(c) forming a mesa part including a fourth nitride semiconductor layer over the third nitride semiconductor layer;

(d) forming a gate insulating film above the mesa part; and

(e) forming a gate electrode over the gate insulating film,

wherein electron affinity of the second nitride semiconductor layer is equal to or larger than electron affinity of the first nitride semiconductor layer,

wherein electron affinity of the third nitride semiconductor layer is smaller than the electron affinity of the first nitride semiconductor layer,

wherein electron affinity of the fourth nitride semiconductor layer is larger than the electron affinity of the first nitride semiconductor layer, and

wherein the step (d) includes the steps of:

(d1) forming a crystalline first film made of oxide of a first metal over the mesa part;

(d2) forming a second film made of oxide of a second metal over the crystalline first film; and

(d3) forming an amorphous third film made of the oxide of the first metal over the second film.

2. The method according to claim 1 , wherein after the step (d3), the step (d) further includes the steps of:

(d4) performing heat treatment on the amorphous third film to crystallize the amorphous third film, thereby forming a crystalline third film made of the oxide of the first metal; and

(d5) forming a fourth film made of the oxide of the second metal over the crystalline third film.

3. The method according to claim 2 , wherein in the step (d1), the amorphous first film is subjected to heat treatment and crystallized, thereby the crystalline first film made of the oxide of the first metal is formed.

4. The method according to claim 3 , wherein the first metal has a lower electronegativity than the second metal.

5. The method according to claim 3 ,

wherein the first film and the third film are each an aluminum oxide film, and

wherein the second film and the fourth film are each a silicon oxide film.

6. The method according to claim 5 , wherein the heat treatment in the step (d4) is performed in an atmosphere of 800° C. or higher.

7. The method according to claim 5 , wherein in the steps (d4) and (d5), the silicon oxide film is formed in an atmosphere of 800° C. or higher.

8. The method according to claim 5 ,

wherein the aluminum oxide film has a thickness of 2 to 20 nm, and

wherein the silicon oxide film has a thickness of 5 to 20 nm.

9. The method according to claim 8 ,

wherein the aluminum oxide film has a thickness of 5 to 10 nm, and

wherein the silicon oxide film has a thickness of 5 to 10 nm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2018
From: OKAMOTO, YASUHIRO; IDE, TAKASHI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 046537/0226 →
Priority Claims (1)
JP 2017-172307 · Sep 7, 2017 · national
Continuity (1)
Related Publication 20190074174A1 · Mar 7, 2019