Multistage amplifier linearization in a radio frequency system
A linearization circuit reduces intermodulation distortion in an amplifier that includes a first stage and a second stage. The linearization circuit receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency, generates an envelope signal based at least in part on a power level of the first signal, and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal, the first stage receives the adjusted signal, and the second stage does not receive the adjusted signal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation between the first frequency and the second frequency from the output of the amplifier.
1. A method to improve amplifier linearity for a cascade amplifier, the method comprising:
receiving at an input of a cascade amplifier a first signal including first and second frequencies, the cascade amplifier including at least first and second amplifier circuits configured in series;
generating a second signal having a third frequency approximately equal to a difference between the first and second frequencies;
adjusting an amplitude of the second signal based at least in part on a power level of the first signal and a tuned slope of a shaping function; and
applying the adjusted second signal to the first amplifier circuit and not to the second amplifier circuit to reduce intermodulation in an output from the cascade amplifier.
2. The method of claim 1 wherein said applying the adjusted second signal to the first amplifier circuit includes applying the adjusted second signal to a direct current access terminal of the first amplifier circuit.
3. The method of claim 2 wherein the direct current access terminal is configured to receive a direct current signal.
4. The method of claim 1 wherein the intermodulation includes third-order intermodulation products of the first and second frequencies.
5. The method of claim 1 wherein the cascade amplifier includes a low noise amplifier.
6. An amplifier circuit assembly comprising:
a linearization circuit configured to receive a first signal including first and second frequencies and to generate a second signal having a frequency approximately equal to a difference between the first and the second frequencies and, the linearization circuit configured to adjust a magnitude of the second signal based at least in part on a power level of the first signal; and
at least first and second amplifier stages configured as a cascade amplifier, the second amplifier stage further configured not to receive the adjusted second signal and the first amplifier stage further configured to receive, at a direct current access terminal, the adjusted second signal to reduce intermodulation in the cascade amplifier.
7. The amplifier circuit assembly of claim 6 wherein the linearization circuit is further configured to adjust the magnitude of the second signal based at least in part on the power level of the first signal and a tuned slope of a shaping function to provide the adjusted second signal.
8. The amplifier circuit assembly of claim 6 wherein the direct current access terminal is configured to receive a direct current signal.
9. The amplifier circuit assembly of claim 6 wherein the first amplifier stage includes one or more field effect transistors.
10. The amplifier circuit assembly of claim 9 wherein the adjusted second signal is applied to a drain of the first amplifier stage.
11. The amplifier circuit assembly of claim 6 wherein the first amplifier stage includes one or more bipolar junction transistors.
12. The amplifier circuit assembly of claim 11 wherein the adjusted second signal is applied to a collector of the first amplifier stage.
13. The amplifier circuit assembly of claim 6 further comprising an envelope generator configured to detect the power level of the first signal.
14. A wireless communication device comprising:
an antenna configured to receive and transmit radio frequency signals; and
a radio frequency front end in communication with the antenna and including first and second amplifier circuits configured as a cascade amplifier to receive a radio frequency input signal that includes first and second frequencies, and provide an amplified radio frequency signal, and the front end further including a linearization circuit configured to receive the radio frequency input signal, generate a second signal having a frequency approximately equal to a difference between the first frequency and the second frequency, and adjust an amplitude of the second signal based at least in part on the radio frequency input signal and a tuned slope of a shaping function, the second amplifier circuit further configured not to receive the adjusted second signal and the first amplifier circuit further configured to receive the adjusted second signal to reduce the intermodulation in the amplified radio frequency signal.
15. The wireless communication device of claim 14 wherein the linearization circuit is further configured to detect the power level of the radio frequency input signal.
16. The wireless communication device of claim 14 wherein the cascade amplifier includes a low noise amplifier.
17. A wireless communication device comprising:
an antenna configured to receive and transmit radio frequency signals; and
a radio frequency front end in communication with the antenna and including first and second amplifier circuits configured as a cascade amplifier to receive a radio frequency input signal that includes first and second frequencies, and provide an amplified radio frequency signal, and the front end further including a linearization circuit configured to receive the radio frequency input signal, generate a second signal having a frequency approximately equal to a difference between the first frequency and the second frequency, and adjust an amplitude of the second signal based at least in part on the radio frequency input signal, the second amplifier circuit further configured not to receive the adjusted second signal and the first amplifier circuit further configured to receive the adjusted second signal at a direct current access terminal to reduce the intermodulation in the amplified radio frequency signal.
18. The wireless communication device of claim 17 wherein the direct current access terminal is configured to receive a direct current signal.
19. The wireless communication device of claim 17 wherein the cascade amplifier includes a power amplifier.
20. The wireless communication device of claim 17 wherein the first amplifier circuit includes one or more field effect transistors and the adjusted second signal is applied to a drain of the one or more field effect transistors.