IP Library › Granted Patent US 10,593,693
Granted Patent B2
US 10,593,693 · App. 16/004,890 · Granted Mar 17, 2020

Semiconductor device and method for manufacturing semiconductor device

Inventors: Shunpei Yamazaki (Setagaya, JP); Hajime Kimura (Atsugi, JP); Takanori Matsuzaki (Atsugi, JP); Kiyoshi Kato (Atsugi, JP); Satoru Okamoto (Isehara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/11582H01L27/1157H01L27/11565H01L27/11573H01L27/11575H01L29/24H01L29/513
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Quick Facts
Patent No.
US 10,593,693
App. No.
16/004,890
Granted
Mar 17, 2020
Kind
B2
Abstract

A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.

Claims (80)

1. A semiconductor device comprising:

a first insulator comprising a first opening;

a first conductor over the first insulator, the first conductor comprising a second opening;

a second insulator over the first conductor, the second insulator comprising a third opening; and

an oxide penetrating the first opening, the second opening, and the third opening,

wherein the oxide comprises a first region in the first opening, a second region in the second opening, and a third region in the third opening, and

wherein the resistances of the first region and the third region are lower than the resistance of the second region.

2. The semiconductor device according to claim 1 , further comprising:

a third insulator in contact with the oxide; and

a second conductor in contact with the third insulator,

wherein the oxide is positioned between the first conductor and the third insulator, and

wherein the third insulator is positioned between the oxide and the second conductor.

3. The semiconductor device according to claim 2 ,

wherein the first conductor serves as a first gate, and

wherein the second conductor serves as a second gate.

4. The semiconductor device according to claim 1 ,

wherein the oxide comprises In, an element M, and Zn, and

wherein M is Al, Ga, Y, or Sn.

5. The semiconductor device according to claim 1 ,

wherein the oxide comprises a first layer, a second layer in contact with an inner wall of the first layer, and a third layer in contact with an inner wall of the second layer, and

wherein an energy gap of the second layer is narrower than an energy gap of the first layer and an energy gap of the third layer.

6. The semiconductor device according to claim 1 , further comprising a first nitride and a second nitride each comprising at least one of silicon and a metal element,

wherein the first nitride is in contact with the first region and the second nitride is in contact with the third region.

7. The semiconductor device according to claim 1 ,

wherein the first region and the third region comprise a larger amount of at least one of hydrogen, nitrogen, and a metal element than the second region.

8. The semiconductor device according to claim 1 , further comprising:

a fourth insulator;

a fifth insulator; and

a sixth insulator,

wherein the fourth insulator is positioned between the first conductor and the oxide,

wherein the fifth insulator is positioned between the fourth insulator and the oxide, and

wherein the sixth insulator is positioned between the fifth insulator and the oxide.

9. The semiconductor device according to claim 8 ,

wherein at least one of the fourth insulator and the sixth insulator is an oxide comprising at least one of silicon, aluminum, and hafnium.

10. The semiconductor device according to claim 8 , further comprising a nitride comprising at least one of silicon and a metal element,

wherein the nitride is in contact with the first region and the third region, and positioned between the sixth insulator and the first region and between the sixth insulator and the third region.

11. The semiconductor device according to claim 1 ,

wherein a diameter of the first opening and a diameter of the third opening are larger than a diameter of the second opening.

12. A semiconductor device comprising:

a first insulator comprising a first opening;

a first conductor over the first insulator, the first conductor comprising a second opening;

a second insulator over the first conductor, the second insulator comprising a third opening;

an oxide positioned in the first opening, the second opening, and the third opening; and

a third insulator between the oxide and the first insulator, the first conductor, and the second insulator,

wherein a diameter of the second opening is larger than a diameter of the first opening and a diameter of the third opening,

wherein the oxide is positioned along a side surface and a top surface of the first insulator, a side surface of the first conductor, and a bottom surface and a side surface of the second insulator with the third insulator positioned between the oxide and the first insulator, the first conductor, and the second insulator,

wherein the oxide comprises a first region in the first opening, a second region in the second opening, and a third region in the third opening, and

wherein the resistances of the first region and the third region are lower than the resistance of the second region.

13. The semiconductor device according to claim 12 , further comprising:

a fourth insulator in contact with the oxide; and

a second conductor in contact with the fourth insulator,

wherein the fourth insulator is positioned between the oxide and the second conductor.

14. The semiconductor device according to claim 13 ,

wherein the first conductor serves as a first gate, and

wherein the second conductor serves as a second gate.

15. The semiconductor device according to claim 12 ,

wherein the oxide comprises In, an element M, and Zn, and

wherein M is Al, Ga, Y, or Sn.

16. The semiconductor device according to claim 12 ,

wherein the oxide comprises a first layer, a second layer in contact with an inner wall of the first layer, and a third layer in contact with an inner wall of the second layer, and

wherein an energy gap of the second layer is narrower than an energy gap of the first layer and an energy gap of the third layer.

17. The semiconductor device according to claim 12 , further comprising a fifth insulator in the second opening,

wherein the oxide is positioned between the third insulator and the fifth insulator.

18. The semiconductor device according to claim 12 ,

wherein the first region and the third region comprise more argon than the second region.

19. The semiconductor device according to claim 12 ,

wherein the first region and the third region comprise a larger amount of at least one of hydrogen, nitrogen, and a metal element than the second region.

20. The semiconductor device according to claim 12 ,

wherein the third insulator comprises:

a sixth insulator;

a seventh insulator; and

an eighth insulator,

wherein the sixth insulator is positioned between the first conductor and the oxide,

wherein the seventh insulator is positioned between the sixth insulator and the oxide, and

wherein the eighth insulator is positioned between the seventh insulator and the oxide.

21. The semiconductor device according to claim 20 ,

wherein at least one of the sixth insulator and the eighth insulator is an oxide comprising at least one of silicon, aluminum, and hafnium.

22. The semiconductor device according to claim 20 ,

wherein the first nitride is positioned between the first region and the first insulator, and

wherein the second nitride is positioned between the third region and the second insulator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2018
From: YAMAZAKI, SHUNPEI; KIMURA, HAJIME; MATSUZAKI, TAKANORI; KATO, KIYOSHI; OKAMOTO, SATORU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 046546/0584 →
Priority Claims (2)
JP 2017-119073 · Jun 16, 2017 · national
JP 2017-132740 · Jul 6, 2017 · national
Continuity (1)
Related Publication 20190006386A1 · Jan 3, 2019
Cited By (6)
US 12,200,934 US 12,250,819 US 12,444,466 US 12,475,948 US 12,550,325 US 12,568,628