Granted Patent B2

US 12,250,819 · App. 17/623,301 · Granted Mar 11, 2025

Inventors: Shunpei Yamazaki (Tokyo, JP); Tatsuya Onuki (Kanagawa, JP); Satoru Okamoto (Kanagawa, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H10B43/27

Abstract

Claims (66)

1. A semiconductor device comprising:

a first insulator comprising a first opening;

a first conductor comprising a second opening over the first insulator;

a second insulator comprising a third opening over the first conductor;

a third insulator provided along a first side surface of the first opening, a second side surface of the second opening, and a third side surface of the third opening;

an oxide provided along the first side surface, the second side surface, and the third side surface with the third insulator therebetween;

a second conductor provided at the first side surface with the third insulator and the oxide therebetween; and

a third conductor provided at the third side surface with the third insulator and the oxide therebetween,

wherein the oxide comprises a first region in the first opening, a second region in the second opening, and a third region in the third opening, and

wherein the second region has higher resistance than the first region and the third region.

2. The semiconductor device according to claim 1 ,

wherein the oxide comprises indium, an element M, and zinc, and

wherein M is one or more selected from aluminum, gallium, yttrium, and tin.

3. The semiconductor device according to claim 1 ,

wherein the oxide comprises:

a first layer;

a second layer provided in contact with an inner side of the first layer; and

a third layer provided in contact with an inner side of the second layer,

wherein an energy gap of the second layer is narrower than an energy gap of the first layer, and

wherein the energy gap of the second layer is narrower than an energy gap of the third layer.

4. The semiconductor device according to claim 1 ,

wherein the second conductor and the third conductor are each configured to block a microwave.

5. The semiconductor device according to claim 1 ,

wherein the second region comprises more oxygen than the first region and the third region.

6. The semiconductor device according to claim 1 ,

wherein the second region comprises less hydrogen than the first region and the third region.

7. The semiconductor device according to claim 1 ,

wherein the second region has a lower carrier concentration than the first region and the third region.

8. The semiconductor device according to claim 1 ,

wherein the third insulator comprises a gate insulating layer, a charge accumulation layer, and a tunnel insulating layer.

9. The semiconductor device according to claim 1 ,

wherein a diameter of the first opening and a diameter of the third opening are larger than a diameter of the second opening.

10. A semiconductor device comprising:

a first insulator comprising a first opening;

a first conductor comprising a second opening over the first insulator;

a second insulator comprising a third opening over the first conductor;

a third insulator provided along a first side surface of the first opening, a second side surface of the second opening, and a third side surface of the third opening;

an oxide provided along the first side surface, the second side surface, and the third side surface with the third insulator therebetween;

a second conductor provided at the first side surface with the third insulator and the oxide therebetween;

a third conductor provided at the third side surface with the third insulator and the oxide therebetween;

a fourth insulator in contact with the oxide, the second conductor, and the third conductor; and

a fourth conductor in contact with the fourth insulator,

wherein the oxide is provided between the first conductor and the fourth insulator,

wherein the fourth insulator is provided between the oxide and the fourth conductor,

wherein the oxide comprises a first region in the first opening, a second region in the second opening, and a third region in the third opening, and

wherein the second region has higher resistance than the first region and the third region.

11. The semiconductor device according to claim 10 ,

wherein the first conductor serves as a first gate, and

wherein the fourth conductor serves as a second gate.

12. The semiconductor device according to claim 10 ,

wherein the oxide comprises indium, an element M, and zinc, and

wherein M is one or more selected from aluminum, gallium, yttrium, and tin.

13. The semiconductor device according to claim 10 ,

wherein the oxide comprises:

a first layer;

a second layer provided in contact with an inner side of the first layer; and

a third layer provided in contact with an inner side of the second layer,

wherein an energy gap of the second layer is narrower than an energy gap of the first layer, and

wherein the energy gap of the second layer is narrower than an energy gap of the third layer.

14. The semiconductor device according to claim 10 ,

wherein the second conductor and the third conductor are each configured to block a microwave.

15. The semiconductor device according to claim 10 ,

wherein the second region comprises more oxygen than the first region and the third region, and

wherein the second region comprises less hydrogen than the first region and the third region.

16. The semiconductor device according to claim 10 ,

wherein the second region has a lower carrier concentration than the first region and the third region.

Assignments (1)

Priority Claims (2)

Continuity (1)

References Cited (26)