IP Library Granted Patent US 10,593,877
Granted Patent B2
US 10,593,877 · App. 15/949,078 · Granted Mar 17, 2020

Resistive random access memory

Inventors: Frederick Chen (San Jose, CA); Ping-Kun Wang (Taichung, TW); Shao-Ching Liao (Taichung, TW); Po-Yen Hsu (Taichung, TW); Yi-Hsiu Chen (Taichung, TW); Ting-Ying Shen (Taichung, TW); Bo-Lun Wu (Taichung, TW); Meng-Hung Lin (Taichung, TW); Chia-Hua Ho (Taichung, TW); Ming-Che Lin (Taichung, TW)
Assignee: Winbond Electronics Corp.
H01L45/146H01L27/2463H01L45/08H01L45/122H01L45/1253H01L45/1266H01L45/1616
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Quick Facts
Patent No.
US 10,593,877
App. No.
15/949,078
Granted
Mar 17, 2020
Kind
B2
Abstract

A resistive random access memory is provided. The resistive random access memory includes a bottom electrode over a substrate, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer containing metal or semiconductor is disposed at sidewalls of the resistance-switching layer, and the sidewalls of the resistance-switching layer is doped with the metal or semiconductor from the sidewall protective layer.

Claims (25)

1. A resistive random access memory comprising:

a bottom electrode disposed over a substrate;

a top electrode disposed over the bottom electrode;

a resistance-switching layer disposed between the bottom electrode and the top electrode;

an oxygen exchange layer disposed between the resistance-switching layer and the top electrode; and

a sidewall protective layer disposed at sidewalls of the resistance-switching layer, wherein a material of the sidewall protective layer comprises aluminum-rich aluminum oxide or silicon-rich silicon nitride, and the sidewalls of the resistance-switching layer, the oxygen exchange layer and the bottom electrode are doped with aluminum or silicon from the sidewall protective layer.

2. The resistive random access memory according to claim 1 , wherein oxygen concentration is enhanced near the sidewalls of the oxygen exchange layer.

3. The resistive random access memory according to claim 1 , wherein a thickness of the sidewall protective layer is between 5 nm and 20 nm.

4. The resistive random access memory according to claim 1 , further comprising an oxygen-rich layer disposed between the oxygen exchange layer and the top electrode.

5. The resistive random access memory according to claim 4 , wherein a material of the oxygen-rich layer comprises aluminum oxide, aluminum oxynitride, titanium oxynitride or tantalum oxynitride.

6. The resistive random access memory according to claim 1 , wherein the material of the sidewall protective layer comprises aluminum-rich aluminum oxide, and the sidewall protective layer is doped with nitrogen.

7. The resistive random access memory according to claim 1 , wherein a material of the oxygen exchange layer comprises titanium, titanium-rich titanium nitride, tantalum, hafnium, zirconium, platinum, or aluminum.

8. The resistive random access memory according to claim 1 , wherein the sidewalls of the oxygen exchange layer, the resistance-switching layer, and the bottom electrode constitute a substantially continuous surface, and the substantially continuous surface is doped with aluminum or silicon.

9. The resistive random access memory according to claim 8 , wherein an angle between the substantially continuous surface and a bottom surface of the bottom electrode is 60-90 degrees.

10. The resistive random access memory according to claim 1 , wherein the sidewall protective layer is further disposed at sidewalls of the top electrode.

11. The resistive random access memory according to claim 1 , wherein the sidewall protective layer is a multi-layer.

12. The resistive random access memory according to claim 11 , wherein the multi-layer comprises:

a first liner layer disposed on the substantially continuous surface; and

a second liner layer disposed on the first liner layer.

13. The resistive random access memory according to claim 12 , wherein a material of the first liner layer comprises aluminum-rich aluminum oxide.

14. The resistive random access memory according to claim 13 , wherein a material of the second liner layer comprises aluminum nitride, silicon nitride, tantalum nitride, strontium titanate or bismuth titanate.

15. The resistive random access memory according to claim 1 , wherein the oxygen exchange layer has a rounded top.

16. The resistive random access memory according to claim 1 , wherein the oxygen exchange layer has a rounded bottom, and a barrier is further disposed between the resistance-switching layer and the rounded bottom of the oxygen exchange layer.

17. The resistive random access memory according to claim 16 , wherein a material of the barrier comprises silicon dioxide (SiO 2 ), titanium oxide (TiO 2 ), aluminum oxide (Al 2 O 3 ), tantalum oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ), or zirconium oxide (ZrO 2 ).

18. The resistive random access memory according to claim 1 , further comprising a block layer disposed between the oxygen exchange layer and the resistance-switching layer, wherein a material of the block layer comprises titanium-doped aluminum oxide, aluminum-doped titanium oxide, tantalum-doped titanium oxide, titanium-doped tantalum oxide, aluminum-doped tantalum oxide, tantalum-doped aluminum oxide, aluminum-doped hafnium oxide, hafnium-doped aluminum oxide, titanium-doped hafnium oxide, hafnium-doped titanium oxide, silicon-doped hafnium oxide, or zirconium-doped hafnium oxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2018
From: CHEN, FREDERICK; WANG, PING-KUN; LIAO, SHAO-CHING; HSU, PO-YEN; CHEN, YI-HSIU; SHEN, TING-YING; WU, BO-LUN; LIN, MENG-HUNG; HO, CHIA-HUA; LIN, MING-CHE
To: WINBOND ELECTRONICS CORP.
Reel/Frame 045485/0193 →
Continuity (2)
Continuation In Part 14967386 · Dec 14, 2015
Related Publication 20180233665A1 · Aug 16, 2018