IP Library › Granted Patent US 10,692,894
Granted Patent B2
US 10,692,894 · App. 16/161,573 · Granted Jun 23, 2020

Oxide semiconductor, thin film transistor, and display device

Inventors: Shunichi Ito (Atsugi, JP); Toshinari Sasaki (Atsugi, JP); Miyuki Hosoba (Isehara, JP); Junichiro Sakata (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225G09G3/20H01L27/1248H01L27/1259H01L29/247H01L29/45H01L29/66969H01L29/7869H01L29/78618H01L29/78693H01L29/78696
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Quick Facts
Patent No.
US 10,692,894
App. No.
16/161,573
Granted
Jun 23, 2020
Kind
B2
Abstract

An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO 3 (ZnO) m , where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.

Claims (48)

1. A semiconductor device comprising:

a pixel portion comprising a transistor,

the transistor comprising:

a gate;

a first insulating layer over the gate;

a second insulating layer over and in contact with the first insulating layer;

a semiconductor layer over and in contact with the second insulating layer;

a third insulating layer over and in contact with the semiconductor layer;

a fourth insulating layer over and in contact with the third insulating layer; and

a source and a drain each electrically connected to the semiconductor layer; and

a display element comprising:

a first electrode electrically connected to one of the source and the drain through a contact hole in the third insulating layer; and

a second electrode over the first electrode,

wherein:

the semiconductor layer includes an oxide semiconductor containing In, Ga, and Zn,

the second insulating layer and the third insulating layer each contain silicon and oxygen,

the first insulating layer and the fourth insulating layer each contain silicon and nitrogen, and

in a channel length direction of the transistor, the second insulating layer and the third insulating layer are in contact with each other with the semiconductor layer therebetween.

2. The semiconductor device according to claim 1 , wherein the display element further comprises a liquid crystal layer between the first and second electrodes.

3. The semiconductor device according to claim 1 , wherein the gate comprises a first layer containing Ti, and a second layer containing Cu over the first layer.

4. The semiconductor device according to claim 1 , wherein the gate comprises a first layer containing Mo, and a second layer containing Cu over the first layer.

5. The semiconductor device according to claim 1 , wherein the source and the drain each comprise a layer containing Cu.

6. The semiconductor device according to claim 1 , wherein the oxide semiconductor includes nanocrystals.

7. The semiconductor device according to claim 1 , wherein the oxide semiconductor is a non-single-crystal semiconductor.

8. A semiconductor device comprising:

a pixel portion comprising a transistor,

the transistor comprising:

a gate;

a first insulating layer over the gate;

a second insulating layer over and in contact with the first insulating layer;

a semiconductor layer over and in contact with the second insulating layer;

a third insulating layer over and in contact with the semiconductor layer;

a fourth insulating layer over and in contact with the third insulating layer; and

a source and a drain each electrically connected to the semiconductor layer; and

a display element comprising:

a first electrode electrically connected to one of the source and the drain through a contact hole in the third insulating layer; and

a second electrode over the first electrode,

wherein:

the semiconductor layer includes an oxide semiconductor containing In, Ga, and Zn,

the second insulating layer and the third insulating layer each contain silicon and oxygen,

the first insulating layer and the fourth insulating layer each contain silicon and nitrogen, and

in a channel length direction of the transistor, the semiconductor layer is surrounded by the second insulating layer and the third insulating layer.

9. The semiconductor device according to claim 8 , wherein the display element further comprises a liquid crystal layer between the first and second electrodes.

10. The semiconductor device according to claim 8 , wherein the gate comprises a first layer containing Ti, and a second layer containing Cu over the first layer.

11. The semiconductor device according to claim 8 , wherein the gate comprises a first layer containing Mo, and a second layer containing Cu over the first layer.

12. The semiconductor device according to claim 8 , wherein the source and the drain each comprise a layer containing Cu.

13. The semiconductor device according to claim 8 , wherein the oxide semiconductor includes nanocrystals.

14. The semiconductor device according to claim 8 , wherein the oxide semiconductor is a non-single-crystal semiconductor.

Priority Claims (1)
JP 2008-274564 · Oct 24, 2008 · national
Continuity (5)
Division 15480560 · Apr 6, 2017
Division 14822995 · Aug 11, 2015
Continuation 14496404 · Sep 25, 2014
Continuation 12581187 · Oct 19, 2009
Related Publication 20190051673A1 · Feb 14, 2019