IP Library › Granted Patent US 10,692,961
Granted Patent B2
US 10,692,961 · App. 16/718,273 · Granted Jun 23, 2020

Display device and semiconductor device

Inventor: Mizuki Sato (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/3276H01L27/124H01L27/1222H01L27/1251H01L27/1255H01L27/156H01L27/3258H01L27/3262H01L27/3265H01L29/786H01L29/78654H01L29/78663H01L29/78672H01L29/78696G02F1/1362H01L27/10805H01L27/3244
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Quick Facts
Patent No.
US 10,692,961
App. No.
16/718,273
Granted
Jun 23, 2020
Kind
B2
Abstract

An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Claims (33)

1. A display device comprising:

first and second transistors over a resin;

first and second wirings over the resin; and

an electroluminescent element over the resin,

wherein the first wiring is electrically connected to one of a source and a drain of the first transistor,

wherein the second wiring is electrically connected to one of a source and a drain of the second transistor,

wherein the electroluminescent element is electrically connected to the other of the source and the drain of the first transistor,

wherein a channel formation region of the first transistor comprises a region through which carriers flow in a first direction,

wherein a semiconductor layer comprising the channel formation region of the first transistor has a bent shape,

wherein the first wiring is configured to transmit current flowing the electroluminescent element through the first transistor,

wherein the first wiring comprises a region overlapping with the semiconductor layer,

wherein the first wiring has a shape which is long along a direction intersecting with the first direction,

wherein the second transistor is configured to supply a signal from the second wiring to the first transistor,

wherein the second wiring comprises a region overlapping with the semiconductor layer,

wherein the channel formation region of the first transistor comprises crystal silicon, and

wherein a channel formation region of the second transistor comprises crystal silicon.

2. A display device comprising:

first and second transistors over a resin;

first and second wirings over the resin; and

an electroluminescent element over the resin,

wherein the first wiring is electrically connected to one of a source and a drain of the first transistor,

wherein the second wiring is electrically connected to one of a source and a drain of the second transistor,

wherein the electroluminescent element is electrically connected to the other of the source and the drain of the first transistor,

wherein a channel formation region of the first transistor comprises a region through which carriers flow in a first direction,

wherein a semiconductor layer comprising the channel formation region of the first transistor has a bent shape,

wherein the first wiring is configured to transmit current flowing the electroluminescent element through the first transistor,

wherein the first wiring comprises a region overlapping with the semiconductor layer,

wherein the first wiring has a shape which is long along a direction intersecting with the first direction,

wherein the second transistor is configured to supply a signal from the second wiring to the first transistor,

wherein the second wiring comprises a region overlapping with the semiconductor layer,

wherein the second wiring has a shape which is long along the direction intersecting with the first direction,

wherein the channel formation region of the first transistor comprises crystal silicon, and

wherein a channel formation region of the second transistor comprises crystal silicon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2019
From: SATO, MIZUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 051327/0642 →
Priority Claims (1)
JP 2006-199292 · Jul 21, 2006 · national
Continuity (11)
Continuation 16240834 · Jan 7, 2019
Continuation 15874939 · Jan 19, 2018
Continuation 15421611 · Feb 1, 2017
Continuation 14989886 · Jan 7, 2016
Continuation 14726752 · Jun 1, 2015
Continuation 14661078 · Mar 18, 2015
Continuation 14275962 · May 13, 2014
Continuation 13848878 · Mar 22, 2013
Continuation 12982200 · Dec 30, 2010
Continuation 11772924 · Jul 3, 2007
Related Publication 20200127074A1 · Apr 23, 2020