IP Library › Granted Patent US 10,693,054
Granted Patent B2
US 10,693,054 · App. 16/046,648 · Granted Jun 23, 2020

MTJ bottom metal via in a memory cell and method for producing the same

Inventors: Danny Pak-Chum Shum (Caspian, SG); Wanbing Yi (Singapore, SG); Curtis Chun-I Hsieh (Singapore, SG); Yi Jiang (Singapore, SG); Juan Boon Tan (Singapore, SG); Benfu Lin (Singapore, SG)
Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
H01L43/02H01L27/222H01L43/12
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Quick Facts
Patent No.
US 10,693,054
App. No.
16/046,648
Granted
Jun 23, 2020
Kind
B2
Abstract

A method of forming a memory cell with a high aspect ratio metal via formed underneath a metal tunnel junction (MTJ) and the resulting device are provided. Embodiments include a device having a metal via formed underneath a metal tunnel junction (MTJ) in a memory cell, and the metal via has an aspect ratio smaller than 2.

Claims (22)

1. A device comprising:

a metal via disposed underneath a metal tunnel junction (MTJ) in a memory cell;

at least two metal interconnecting layers,

wherein a first metal interconnecting layer is disposed over the MTJ, and a second metal interconnecting layer is disposed underneath the metal via, and

wherein the metal via has an aspect ratio smaller than 2, and

wherein the first metal interconnecting layer has a wider pitch than the second metal interconnecting layer.

2. The device according to claim 1 , wherein the device is a magnetic random-access memory (MRAM) device.

3. The device according to claim 1 , wherein the first and second metal interconnecting layers comprise copper (Cu).

4. The device according to claim 1 , wherein the metal via comprises tungsten (W).

5. The device according to claim 1 , wherein the metal via comprises tantalum nitride (TaN) and has a top level smaller than a bottom level.

6. The device according to claim 1 , further comprising: a bottom electrode disposed between the MTJ and the metal via.

7. A method comprising:

forming a metal via in an interlayer dielectric (ILD) in a memory cell;

forming a metal tunnel junction (MTJ) over the metal via, wherein the metal via has an aspect ratio smaller than 2;

forming a first metal interconnecting layer before forming the metal via, wherein the metal via is formed over the first metal interconnecting layer; and

forming a second metal interconnecting layer over the MTJ,

wherein the first metal interconnecting layer has a wider pitch than the second metal interconnecting layer.

8. The method according to claim 7 , wherein the memory cell is formed in a magnetic random-access memory (MRAM) device.

9. The method according to claim 7 , further comprising:

forming a bottom electrode over the metal via, wherein the MTJ is disposed over the bottom electrode.

10. The method according to claim 7 , wherein the metal via comprises tungsten (W).

11. The method according to claim 7 , wherein the metal via comprises tantalum nitride (TaN) and has a top level smaller than a bottom level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2018
From: SHUM, DANNY PAK-CHUM; YI, WANBING; HSIEH, CURTIS CHUN-I; JIANG, YI; TAN, JUAN BOON; LIN, BENFU
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 046488/0177 →
Continuity (1)
Related Publication 20200035906A1 · Jan 30, 2020
Cited By (2)
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