Semicondcutor package and manufacturing method of semicondcutor package
A semiconductor package includes an encapsulated semiconductor device, a first redistribution structure, an insulating layer, and an antenna. The encapsulated semiconductor device includes a semiconductor device encapsulated by an encapsulation material. The redistribution structure is disposed on a first side the encapsulated semiconductor device and electrically connected to the semiconductor device. The insulating layer is disposed on a second side of the encapsulated semiconductor device and comprises a groove pattern. The antenna is filled the groove pattern, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer.
1. A manufacturing method of a semiconductor package, comprising:
forming an encapsulated semiconductor device on a carrier;
forming a first redistribution structure on a first side of the encapsulated semiconductor device;
removing the carrier from the encapsulated semiconductor device;
forming an insulating layer on a second side of the encapsulated semiconductor device where the carrier is removed from;
forming a groove pattern on the insulating layer;
filling a conductive paste in the groove pattern; and
performing a curing process on the conductive paste to form an antenna in the groove pattern, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer.
2. The manufacturing method of the semiconductor package as claimed in claim 1 , further comprising:
forming a second redistribution structure on the carrier before the encapsulated semiconductor device is formed on the carrier, wherein the insulating layer is formed on the second redistribution structure on the second side of the encapsulated semiconductor device.
3. The manufacturing method of the semiconductor package as claimed in claim 1 , wherein the groove pattern is formed by laser drilling.
4. The manufacturing method of the semiconductor package as claimed in claim 1 , further comprising:
performing a planarizing process on the antenna and the insulating layer after the conductive paste is cured.
5. The manufacturing method of the semiconductor package as claimed in claim 1 , further comprising:
forming a protection layer on the insulating layer to cover the upper surface of the antenna and the upper surface of the insulating layer.
6. A method, comprising:
placing a semiconductor device on a first-side redistribution structure;
encapsulating the semiconductor device with an encapsulating material placed on the first-side redistribution structure;
forming a second-side redistribution structure on the encapsulating material and the semiconductor device encapsulated by the encapsulating material;
after forming the second-side redistribution structure, forming an insulating layer on the first-side redistribution structure;
forming a groove pattern on the insulating layer; and
filling a conductive paste in the groove pattern and curing the conductive paste to form an antenna in the groove pattern.
7. The method as claimed in claim 6 , wherein an active surface of the semiconductor device faces the first-side redistribution structure after the semiconductor device is placed on the first-side redistribution structure.
8. The method as claimed in claim 6 , wherein a back surface of the semiconductor device faces the first-side redistribution structure after the semiconductor device is placed on the first-side redistribution structure.
9. The method as claimed in claim 6 , wherein the groove pattern is formed by laser drilling and the groove pattern comprises tapered sidewalls.
10. The method as claimed in claim 6 , further comprising:
after curing the conductive paste, performing a planarizing process on the antenna and the insulating layer, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer after performing the planarizing process on the antenna and the insulating layer.
11. The method as claimed in claim 6 , further comprising:
forming a protection layer on the insulating layer to cover the upper surface of the antenna and the upper surface of the insulating layer.
12. The method as claimed in claim 6 , further comprising:
forming through vias on the first-side redistribution structure before encapsulating the semiconductor device with the encapsulating material,
wherein the second-side redistribution structure is electrically connected to the first-side redistribution structure through the through vias encapsulated by the encapsulating material.
13. The method as claimed in claim 6 , wherein the conductive paste is filled in the groove pattern without using a mask or a stencil.
14. The method as claimed in claim 6 , wherein the conductive paste is filled in the groove pattern without using a screen printing process.
15. A method, comprising:
providing an encapsulated semiconductor device comprising a first-side redistribution structure and a second second-side redistribution structure disposed on opposite sides thereof;
forming an insulating layer covering the first-side redistribution structure;
forming a groove pattern on the insulating layer;
filling a conductive paste in the groove pattern such that slope of tapered sidewalls of the conductive paste is controlled by the groove pattern; and
curing the conductive paste filled in the groove pattern.
16. The method as claimed in claim 15 , wherein the conductive paste is filled in the groove pattern without using a mask or a stencil.
17. The method as claimed in claim 15 , wherein the conductive paste is filled in the groove pattern without using a screen printing process.
18. The method as claimed in claim 15 , wherein the groove pattern is formed by laser drilling.
19. The method as claimed in claim 15 , further comprising:
after curing the conductive paste, performing a planarizing process on the conductive paste.
20. The method as claimed in claim 15 , further comprising:
forming a protection layer to cover an upper surface of the conductive paste.