Wraparound contact surrounding source/drain regions of integrated circuit structures and method of forming same

1. An integrated circuit (IC) structure, comprising:

a semiconductor substrate, including a first fin and a second fin spaced from the first fin;

a first source/drain region in the first fin, the first source/drain region encompassing a top surface and two opposing lateral sides of the first fin;

a second source/drain region in the second fin, the second source/drain encompassing a top surface and two opposing lateral sides of the second fin;

a first metal contact extending over the first source/drain region and the second source/drain region and surrounding the top surface and at least a portion of the two opposing lateral sides of each of the first and the second source/drain regions;

a third source/drain region in the first fin spaced from the first source/drain region, the third source/drain region encompassing the top surface and the two opposing lateral sides of the first fin;

a fourth source/drain region in the second fin spaced from the second source/drain region, the fourth source/drain region encompassing the top surface and the two opposing lateral sides of the second fin;

a second metal contact extending over the third source/drain region and the fourth source/drain region and surrounding a top surface and at least a portion of two opposing lateral sides of each of the third and the fourth source/drain regions; and

a metal gate positioned on the first fin between the first source/drain region and the third source/drain region, and positioned on the second fin between the second source/drain region and the fourth source/drain region, wherein a first portion of the first fin underneath the metal gate has a first width that is less than a second width of a second portion of the first fin in which the first source/drain region is positioned.

2. The IC structure of claim 1 , further comprising:

a third fin on the semiconductor substrate spaced from the first fin and the second fin; and

the third source/drain region encompassing a top surface and two opposing lateral sides of the third fin,

wherein the first metal contact extends over the third source/drain region and surrounds the top surface and at least a portion of the two opposing lateral sides of the third source/drain region.

3. The IC structure of claim 1 , wherein the first source/drain region is spaced from the second source/drain region.

4. An integrated circuit (IC) structure, comprising:

a semiconductor substrate;

a plurality of semiconductor fins extending from the substrate;

a first set of source/drain regions each positioned in one fin of a first subset of adjacent fins of the plurality of fins, each source/drain region of the first set of source/drain regions encompassing a top surface and two opposing lateral sides of a respective fin, wherein the first subset of adjacent fins includes at least two fins;

a second set of source/drain regions each positioned in one fin of a second subset of adjacent fins of the plurality of fins, each source/drain region of the second set of source/drain regions encompassing a top surface and two opposing lateral sides of a respective fin, wherein the second subset of adjacent fins includes at least two fins and the second subset of adjacent fins are different than the first subset of adjacent fins;

a first metal contact positioned over the first set of source/drain regions, wherein the first metal contact surrounds the top surface and at least a portion of the two opposing lateral sides of each source/drain region of the first set of source/drain regions;

a second metal contact positioned over the second set of source/drain regions, wherein the second metal contact surrounds the top surface and at least a portion of the two opposing lateral sides of each source/drain region of the second set of source/drain regions; and

a metal gate positioned on one fin of the first subset of adjacent fins and on one fin of the second subset of adjacent fins, the metal gate positioned between the first set of source/drain regions and the second set of source/drain regions wherein a first portion of the one fin of the first subset of fins is underneath the metal gate and has a first width that is less than a second width of a second portion of the one fin of the first subset of fins in which the first source/drain regions are positioned.

5. The IC structure of claim 4 , wherein each source/drain region of the first set of source/drain regions is spaced from every other source/drain region of the first set of source/drain regions, and wherein each source/drain region of the second set of source/drain regions is spaced from every other source/drain region of the second set of source/drain regions.

6. The IC structure of claim 4 , wherein a first spacing between the first subset of adjacent fins and the second subset of adjacent fins is less than three times a second spacing between adjacent fins in the first subset of adjacent fins.