Dielectric gap-filling process for semiconductor device

1. A method comprising:

forming a trench in a substrate;

forming a first liner layer along sidewalls and a bottom of the trench;

forming a first silicon-rich layer over the first liner layer, silicon content of the first silicon-rich layer being between about 30 atomic % and about 40 atomic %, wherein forming the first silicon-rich layer comprises:

flowing a first silicon precursor into a process chamber for a first time interval; and

flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second time interval, the second time interval being different from the first time interval;

forming a dielectric layer over the first silicon-rich layer;

forming a sacrificial gate over the substrate and the dielectric layer;

forming a second liner layer along sidewalls and over a top surface of the sacrificial gate; and

forming a second silicon-rich layer over the second liner layer.

2. The method of claim 1 , wherein forming the first silicon-rich layer further comprises:

flowing a third silicon precursor into the process chamber for a third time interval; and

flowing a fourth silicon precursor and a second oxygen precursor into the process chamber for a fourth time interval, the fourth time interval being different from the third time interval.

3. The method of claim 1 , wherein the first silicon precursor and the second silicon precursor comprise a same chemical.

4. The method of claim 1 , further comprising performing an ultraviolet/oxygen treatment on the dielectric layer.

5. The method of claim 4 , wherein performing the ultraviolet/oxygen treatment on the dielectric layer comprises subjecting the dielectric layer to an ultraviolet radiation in an oxygen ambient.

6. The method of claim 4 , further comprising, after preforming the ultraviolet/oxygen treatment, performing a thermal treatment on the dielectric layer.

7. A method comprising:

patterning a substrate to form trenches therein, portions of the substrate between adjacent trenches forming semiconductor strips;

forming isolation regions in the trenches, portions of the semiconductor strips extending above the isolation regions forming fins, wherein forming the isolation regions comprises:

conformally forming a first liner layer in the trenches;

forming a first silicon-rich layer over the first liner layer, the first silicon-rich layer extending along sidewalls and a top surface of each of the semiconductor strips, wherein forming the first silicon-rich layer comprises:

flowing a first silicon precursor into a process chamber for a first number of cycles; and

flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second number of cycles, the second number of cycles being different from the first number of cycles; and

forming a first dielectric layer over the first silicon-rich layer;

forming sacrificial gates along sidewalls and top surfaces of the fins;

conformally forming a second liner layer over the sacrificial gates;

forming a second silicon-rich layer over the second liner layer, wherein forming the second silicon-rich layer comprises:

flowing a third silicon precursor into the process chamber for a third number of cycles; and

flowing a fourth silicon precursor and a second oxygen precursor into the process chamber for a fourth number of cycles, the fourth number of cycles being different from the third number of cycles; and

forming a second dielectric layer over the second silicon-rich layer.

8. The method of claim 7 , wherein forming the first silicon-rich layer further comprises:

flowing a fifth silicon precursor into the process chamber for a fifth number of cycles; and

flowing a sixth silicon precursor and a third oxygen precursor into the process chamber for a sixth number of cycles, the sixth number of cycles being different from the fifth number of cycles.

9. The method of claim 7 , wherein conformally forming the first liner layer in the trenches comprises depositing a dielectric material along sidewalls and bottoms of the trenches using an atomic layer deposition (ALD) process.

10. The method of claim 7 , wherein forming the first dielectric layer comprises flowing a fifth silicon precursor, a third oxygen precursor, and an oxygen-containing plasma into the process chamber for a fifth number of cycles.

11. The method of claim 7 , further comprising:

performing an ultraviolet/oxygen treatment on the first dielectric layer; and

after preforming the ultraviolet/oxygen treatment, performing a thermal treatment on the first dielectric layer.

12. The method of claim 11 , wherein performing the ultraviolet/oxygen treatment on the first dielectric layer comprises subjecting the first dielectric layer to an ultraviolet radiation in an oxygen ambient.

13. The method of claim 7 , wherein silicon content of the first silicon-rich layer is between about 30 atomic % and about 40 atomic %.

14. A method comprising:

forming isolation regions in a substrate, portion of the substrate extending between and over adjacent isolation regions forming fins;

forming sacrificial gates along sidewalls and top surfaces of the fins;

forming a first liner layer along sidewalls and over top surfaces of the sacrificial gates;

forming a first silicon-rich layer over the first liner layer, wherein forming the first silicon-rich layer comprises:

flowing a first silicon precursor into a process chamber for a first number of cycles; and

flowing a second silicon precursor and a first oxygen precursor into the process chamber for a second number of cycles, the second number of cycles being different from the first number of cycles; and

forming a first dielectric layer over the first silicon-rich layer.

15. The method of claim 14 , wherein forming the first silicon-rich layer further comprises:

flowing a third silicon precursor into the process chamber for a third number of cycles; and

flowing a fourth silicon precursor and a second oxygen precursor into the process chamber for a fourth number of cycles, the fourth number of cycles being different from the third number of cycles.

16. The method of claim 14 , wherein forming the isolation regions comprises:

patterning the substrate to form trenches in the substrate;

conformally forming a second liner layer in the trenches;

forming a second silicon-rich layer over the second liner layer, wherein forming the second silicon-rich layer comprises:

flowing a third silicon precursor into the process chamber for a third number of cycles; and

flowing a fourth silicon precursor and a second oxygen precursor into the process chamber for a fourth number of cycles, the fourth number of cycles being different from the third number of cycles; and

forming a second dielectric layer over the second silicon-rich layer.

17. The method of claim 14 , wherein forming the first dielectric layer comprises flowing a third silicon precursor, a second oxygen precursor, and an oxygen-containing plasma into the process chamber for a third number of cycles.

18. The method of claim 14 , further comprising performing an ultraviolet/oxygen treatment on the first dielectric layer.

19. The method of claim 18 , further comprising, after preforming the ultraviolet/oxygen treatment, performing a thermal treatment on the first dielectric layer.

20. The method of claim 14 , wherein the first silicon precursor and the second silicon precursor comprise a same chemical.