IP Library › Granted Patent US 10,763,352
Granted Patent B2
US 10,763,352 · App. 16/120,109 · Granted Sep 1, 2020

Semiconductor device

Inventors: Hiroshi Matsuba (Fujisawa Kanagawa, JP); Hung Hung (Kawasaki Kanagawa, JP); Tatsuya Nishiwaki (Nonoichi Ishikawa, JP); Kohei Oasa (Nonoichi Ishikawa, JP); Kikuo Aida (Nomi Ishikawa, JP)
Assignees: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
H01L29/7813H01L29/0615H01L29/407
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Quick Facts
Patent No.
US 10,763,352
App. No.
16/120,109
Granted
Sep 1, 2020
Kind
B2
Abstract

A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.

Claims (49)

1. A semiconductor device, comprising:

a semiconductor layer having a first surface and a second surface opposite to the first surface, the semiconductor layer including:

a gradient impurity concentration region of a first conductivity type;

a first semiconductor region of a second conductivity type located between the gradient impurity concentration region and the first surface;

a second semiconductor region of the first conductivity type located between the first semiconductor region and the first surface;

one or more first trenches extending from the first surface into the gradient impurity concentration region; and

a second trench extending from the first surface into the gradient impurity concentration region and surrounding the first trench;

a first electrode provided in the first trench and surrounded by a first insulating film in the first trench;

a second electrode provided in the first trench and surrounded by a second insulating film in the first trench;

a third electrode provided in the second trench and surrounded by a third insulating film in the second trench, wherein

the gradient impurity concentration region continuously includes a first subregion at a first depth range from the first surface, a second subregion at a second depth range from the first surface that is shallower than the first depth range, and a third subregion at a third depth range from the first surface that is shallower than the second depth range, and

the first subregion has a first impurity concentration, the second subregion has a second impurity concentration, and the third subregion has a third impurity concentration lower than the second impurity concentration.

2. The semiconductor device according to claim 1 , wherein the second impurity concentration is higher than the first impurity concentration.

3. The semiconductor device according to claim 2 , wherein the first impurity concentration and the third impurity concentration are substantially equal.

4. The semiconductor device according to claim 2 , wherein the third impurity concentration is lower than the first impurity concentration.

5. The semiconductor device according to claim 1 , wherein the second impurity concentration is substantially equal to the first impurity concentration.

6. The semiconductor device according to claim 1 , wherein the second impurity concentration is lower than the first impurity concentration.

7. The semiconductor device according to claim 1 , wherein

the semiconductor device includes an active region and a termination region, and

the first trench is provided in the active region, and the second trench is provided in the termination region of the semiconductor device.

8. The semiconductor device according to claim 1 , wherein

a plurality of the first trenches extend in a first plane direction and are spaced from one another at a predetermined interval in a second plane direction crossing the first plane direction,

a first part of the second trench extends in the first plane direction along a closest one of the first trenches, and

a distance between the closest one of the first trenches and the first part of the second trench in the second plane direction is substantially equal to the predetermined interval.

9. The semiconductor device according to claim 8 , wherein

a second part of the second trench extends in the second plane direction, and

a distance between at least one of the first trenches and the second part of the second trench is equal to the predetermined interval.

10. A semiconductor device, comprising:

a semiconductor layer, the semiconductor layer including:

a gradient impurity concentration region of a first conductivity type;

a first semiconductor region of a second conductivity type located between the gradient impurity concentration region and the first surface;

a second semiconductor region of the first conductivity type located between the first semiconductor region and the first surface;

one or more first trenches extending from the first surface into the gradient impurity concentration region; and

a second trench extending from the first surface into the gradient impurity concentration region and surrounding the first trench;

a first electrode provided in the first trench and surrounded by a first insulating film in the first trench;

a second electrode provided in the first trench and surrounded by a second insulating film in the first trench; and

a third electrode provided in the second trench and surrounded by a third insulating film in the second trench, wherein

an impurity concentration in the gradient impurity concentration region gradually decreases in a depth direction from the first surface toward the second surface.

11. The semiconductor device according to claim 10 , wherein the impurity concentration in the gradient impurity concentration region continuously decreases in the depth direction.

12. The semiconductor device according to claim 10 , wherein

the semiconductor device includes an active region and a termination region, and

the first trench is provided in the active region, and the second trench is provided in the termination region of the semiconductor device.

13. The semiconductor device according to claim 10 , wherein

a plurality of the first trenches are provided, the plurality of the first trenches extending in a first plane direction and being spaced from one another at a predetermined interval in a second plane direction crossing the first plane direction,

a first part of the second trench extends in the first plane direction along a closest one of the first trenches, and

a distance between the closest one of the first trenches and the first part of the second trench in the second plane direction is substantially equal to the predetermined interval.

14. The semiconductor device according to claim 13 , wherein

a second part of the second trench extends in the second plane direction, and

a distance between at least one of the first trenches and the second part of the second trench is equal to the predetermined interval.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2018
From: MATSUBA, HIROSHI; HUNG, HUNG; NISHIWAKI, TATSUYA; OASA, KOHEI; AIDA, KIKUO
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 047059/0818 →
Priority Claims (1)
JP 2018-027575 · Feb 20, 2018 · national
Continuity (1)
Related Publication 20190259871A1 · Aug 22, 2019
Cited By (2)
US 12,396,208 US 12,660,277