Memory page access counts based on page refresh
A processing system tracks counts of accesses to memory pages using a set of counters located at the memory module that stores the pages, wherein the counts are adjusted at least in part based on refreshes of the memory pages. This approach allows a processing system to efficiently maintain the counts with relatively small counters and with relatively low overhead. Furthermore, the rate at which the counters are adjusted, relative to the page refreshes, is adjustable, so that the access counts are useful for a wide variety of application types.
1. A method comprising:
in response to a first access to a first memory page at a first memory, adjusting a first access count by a first adjustment;
in response to a first refresh of the first memory page at the first memory, adjusting the first access count by a second adjustment; and
managing locations of a plurality of memory pages at a plurality of memories based on the first access count, wherein managing comprises:
transferring the first memory page from the first memory to a second memory based on the first access count exceeding an access count threshold.
2. The method of claim 1 , further comprising:
executing the first access at the first memory in response to a first command; and
wherein adjusting the first access count by the first amount comprises adjusting the first access count in response to the first command.
3. The method of claim 2 , further comprising:
executing the first refresh of the first memory page in response to a second command; and
wherein adjusting the first access count by the second adjustment comprises adjusting the first access count in response to the second command.
4. The method of claim 1 , wherein the first adjustment has a different magnitude than the second adjustment.
5. The method of claim 1 , further comprising:
in response to a second refresh of the first memory page, maintaining the first access count.
6. The method of claim 1 , further comprising:
for every N refreshes of the first memory page, adjusting the first access count by the second amount, where N is an integer greater than 1.
7. The method of claim 6 , wherein N is an adjustable value.
8. The method of claim 7 , further comprising:
setting N based on a threshold number of memory pages of the first memory each being associated with a threshold count of memory accesses.
9. The method of claim 7 , further comprising:
determining a number of memory pages associated with a threshold count of memory accesses; and
adjusting N in response to the determined number of memory pages being outside a specified range.
10. The method of claim 1 , further comprising:
in response to a second access to a second memory page at the first memory, adjusting a second access count by the first adjustment;
in response to a second refresh of the second memory page at the first memory, adjusting the second access count by the second adjustment; and
managing locations of a plurality of memory pages at the plurality of memories based on the second access count.
11. A method, comprising:
increasing a counter at a first memory in response to memory accesses to a memory page stored at the memory;
decreasing the counter in response to every N refresh cycles, where N is an integer; and
managing data stored at the memory based on the counter, wherein managing comprises:
transferring the memory page from the first memory to a second memory based on the counter exceeding an access count threshold.
12. The method of claim 11 , further comprising:
periodically adjusting N based on the counter.
13. A device, comprising:
a first memory to store:
a first memory page; and
a second memory page;
the first memory configured to:
in response to a first access to a first memory page, adjust a first access count by a first adjustment;
in response to a first refresh of the first memory page at the memory, adjust the first access count by a second adjustment
a memory controller to manage data stored at the first memory and a second memory, wherein managing comprises:
transferring the first memory page from the first memory to the second memory based on the first access count exceeding an access count threshold.
14. The device of claim 13 , wherein the first memory is further configured to:
execute the first access at the first memory in response to a first command; and
wherein adjusting the first access count by the first amount comprises adjusting the first access count in response to the first command.
15. The device of claim 14 , wherein the first memory is further configured to:
executing the first refresh of the first memory page in response to a second command; and
wherein adjusting the first access count by the second amount comprises adjusting the first access count in response to the second command.
16. The device of claim 13 , wherein the first adjustment has a different magnitude than the second adjustment.
17. The device of claim 13 , wherein the first memory is further configured to:
in response to a second refresh of the first memory page, maintain the first access count.
18. The device of claim 13 , wherein the first memory is further configured to:
for every N refreshes of the first memory page, adjust the first access count by the second amount, where N is an integer greater than 1.
19. The device of claim 18 , wherein N is an adjustable value.
20. The device of claim 19 , further comprising a memory controller configured to:
set N based on a threshold number of memory pages of the first memory each being associated with a threshold count of memory accesses.