IP Library › Granted Patent US 10,833,033
Granted Patent B2
US 10,833,033 · App. 16/458,324 · Granted Nov 10, 2020

Bump structure having a side recess and semiconductor structure including the same

Inventors: Chih-Horng Chang (Taipei, TW); Tin-Hao Kuo (Hsinchu, TW); Chen-Shien Chen (Zhubei, TW); Yen-Liang Lin (Taichung, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L24/13H01L24/11H01L24/14H01L24/16H01L24/81H01L25/50H01L2224/0401H01L2224/05552H01L2224/05572H01L2224/05599H01L2224/10145H01L2224/11849H01L2224/131H01L2224/13011H01L2224/13012H01L2224/13015H01L2224/13018H01L2224/13082H01L2224/13083H01L2224/13147H01L2224/1412H01L2224/14051H01L2224/14152H01L2224/14153H01L2224/16238H01L2224/81191H01L2224/81345H01L2224/81815H01L2924/00014H01L2924/01322H01L2924/2064H01L2924/384Y10T428/12493Y10T428/24479
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Quick Facts
Patent No.
US 10,833,033
App. No.
16/458,324
Granted
Nov 10, 2020
Kind
B2
Abstract

The present disclosure, in some embodiments, relates to a bump structure. The bump structure includes a conductive layer and a solder layer. The solder layer is disposed vertically below and laterally between portions of the conductive layer along a cross-section. The conductive layer is continuous between the portions.

Claims (33)

1. A bump structure, comprising:

a conductive layer on a substrate;

a solder layer arranged on the conductive layer; and

wherein the conductive layer has a curved surface that defines a recess within a side of the conductive layer, the solder layer disposed within the recess and covering an entirety of the curved surface as viewed along a cross-sectional view.

2. The bump structure of claim 1 , wherein the conductive layer is asymmetric about a vertical line bisecting the conductive layer.

3. The bump structure of claim 1 , wherein the curved surface defining the recess has a smaller height than the conductive layer.

4. The bump structure of claim 1 , wherein a second side of the conductive layer that opposes the side of the conductive layer does not have a curved surface defining a recess.

5. The bump structure of claim 1 ,

wherein the recess has a first width along a first direction; and

wherein a ratio of the first width to a maximum width of the conductive layer along the first direction is in a range of between about 0.02 and about 0.5.

6. The bump structure of claim 1 , wherein the conductive layer has a smaller height along a vertical direction than the solder layer.

7. The bump structure of claim 1 , wherein the solder layer contacts an outermost sidewall of the conductive layer along a second side of the conductive layer opposing the side of the conductive layer.

8. The bump structure of claim 1 , wherein the conductive layer comprises a metal.

9. A conductive bump structure, comprising:

a conductive layer having one or more surfaces defining a recess along a side of the conductive layer;

a solder material extending from below the conductive layer to within the recess; and

wherein the conductive layer has a greater thickness measured through a center of the conductive layer than along the one or more surfaces defining the recess.

10. The conductive bump structure of claim 9 , wherein the conductive layer laterally surrounds the solder material along a first direction and wherein the solder material is disposed along an outermost sidewall of the conductive layer along a second direction perpendicular to the first direction.

11. The conductive bump structure of claim 9 , wherein the solder material completely fills the recess.

12. The conductive bump structure of claim 9 , wherein the solder material covers an entirety of the one or more surfaces defining the recess along the side of the conductive layer.

13. The conductive bump structure of claim 9 , further comprising:

a conductive trace disposed onto a substrate below the solder material, wherein the solder material couples the conductive trace to the conductive layer.

14. The conductive bump structure of claim 9 , wherein the solder material is asymmetric about a vertical line that extends through a lateral center of the solder material.

15. A bump structure, comprising:

a conductive layer having one or more surfaces that define a recess along a side of the conductive layer;

a solder layer over the conductive layer; and

wherein the solder layer comprises one or more surfaces defining a protrusion that extends outward from a horizontally extending surface of the solder layer facing the conductive layer to within the recess, wherein the protrusion extends to a bottom of the one or more surfaces defining the recess.

16. The bump structure of claim 15 , wherein the conductive layer is asymmetric about a vertical line bisecting the conductive layer.

17. The bump structure of claim 15 , wherein the protrusion has a first side facing the conductive layer and an opposing second side facing away from the conductive layer.

18. The bump structure of claim 15 , wherein the conductive layer continuously extends from a first side of the protrusion to an opposing second side of the protrusion as viewed in a top view of the protrusion.

19. The bump structure of claim 15 , further comprising:

an under-bump metallurgy (UBM) layer disposed over the conductive layer, wherein the protrusion extends from below the conductive layer to the UBM layer.

20. The bump structure of claim 15 , wherein the protrusion is disposed along an outermost surface of the solder layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2019
From: CHANG, CHIH-HORNG; KUO, TIN-HAO; CHEN, CHEN-SHIEN; LIN, YEN-LIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 049637/0980 →
Continuity (7)
Continuation 15803008 · Nov 3, 2017
Continuation 15353197 · Nov 16, 2016
Continuation 15057302 · Mar 1, 2016
Continuation 14800934 · Jul 16, 2015
Continuation 14507189 · Oct 6, 2014
Continuation In Part 13192302 · Jul 27, 2011
Related Publication 20190326240A1 · Oct 24, 2019
Cited By (1)
US 12,648,221