IP Library Granted Patent US 10,840,084
Granted Patent B2
US 10,840,084 · App. 16/165,176 · Granted Nov 17, 2020

Method of manufacturing semiconductor device and substrate processing apparatus

Inventor: Tatsuya Yamaguchi (Nirasaki, JP)
Assignee: TOKYO ELECTRON LIMITED
H01L21/02118H01L21/0228H01L21/02271H01L21/02282H01L21/3105H01L21/31116H01L21/31138H01L21/324H01L21/32133H01L21/32139H01L21/6715H01L21/67103H01L21/67248H01L21/67366H01L21/768H01L43/12H01L45/04H01L45/06H01L45/1233H01L45/16
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Quick Facts
Patent No.
US 10,840,084
App. No.
16/165,176
Granted
Nov 17, 2020
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes: forming a protective material composed of a polymer having a urea bond by supplying a raw material for polymerization to a surface of a substrate for manufacturing the semiconductor device, the protective material configured to protect a protection target layer provided in the substrate against a treatment to be performed on the substrate; subsequently performing the process on the substrate on which the protective material is formed; and subsequently removing the protective material by heating the substrate under a low oxygen atmosphere to depolymerize the polymer.

Claims (9)

1. A method of manufacturing a semiconductor device, comprising:

forming a protective material composed of a polymer having a urea bond by supplying a raw material for polymerization to a surface of a substrate for manufacturing the semiconductor device, the protective material configured to protect a protection target layer provided in the substrate against a treatment to be performed on the substrate;

subsequently performing the treatment on the substrate on which the protective material is formed; and

subsequently removing the protective material by heating the substrate under a low oxygen atmosphere to depolymerize the polymer.

2. The method of claim 1 , wherein the protective material is a sacrificial film formed on the protection target layer.

3. The method of claim 2 , wherein the protection target layer is a metal film constituting a conductive path of the semiconductor device, and the protective material is formed by being laminated on the metal film.

4. The method of claim 1 , wherein the protection target layer is a porous body, and the protective material is formed by being embedded in the porous body.

5. The method of claim 1 , wherein the low oxygen atmosphere is an atmosphere having an oxygen concentration of 200 ppm or less.

6. The method of claim 1 , wherein the removing the protective material further includes heating the substrate to a temperature lower than 400 degrees C. for five minutes or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2018
From: YAMAGUCHI, TATSUYA
To: TOKYO ELECTRON LIMITED
Reel/Frame 047260/0307 →
Priority Claims (1)
JP 2017-207428 · Oct 26, 2017 · national
Continuity (1)
Related Publication 20190131125A1 · May 2, 2019
Cited By (1)
US 12,557,641