IP Library › Granted Patent US 10,853,134
Granted Patent B2
US 10,853,134 · App. 15/956,480 · Granted Dec 1, 2020

Software defined multi-domain creation and isolation for a heterogeneous System-on-Chip

Inventors: Somdutt Javre (Seoni, IN); Siddharth Rele (Navi Mumbai, IN); Gangadhar Budde (Renapur, IN); Appa Rao Nali (Hyderabad, IN); Chaitanya Kamarapu (Hyderabad, IN)
Assignee: Xilinx, Inc.
G06F9/50G06F8/20G06F8/30G06F9/4405G06F9/4406
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Quick Facts
Patent No.
US 10,853,134
App. No.
15/956,480
Granted
Dec 1, 2020
Kind
B2
Abstract

Multi-domain creation and isolation within a heterogeneous System-on-Chip (SoC) may include receiving a hardware description file specifying a plurality of processors and a plurality of hardware resources available within a heterogeneous SoC and creating, using computer hardware, a plurality of domains for the heterogeneous SoC, wherein each domain includes a processor selected from the plurality of processors and a hardware resource selected from the plurality of hardware resources. The method may include assigning, using the computer hardware, an operating system to each domain and generating, using the computer hardware, a platform that is configured to implement the plurality of domains within the heterogeneous SoC.

Claims (39)

1. A method, comprising:

receiving a hardware description file specifying a plurality of processors and a plurality of hardware resources of a heterogeneous System-on-Chip (SoC), wherein the plurality of processors are configured to execute program code and are available for use by a design for the SoC, and wherein the plurality of hardware resources are available for use by embedded applications;

based on the hardware description file and received user input, determining, using computer hardware, a plurality of domains for the heterogeneous SoC, wherein each domain includes a processor selected from the plurality of processors and a hardware resource selected from the plurality of hardware resources;

for each of the plurality of domains, assigning, using the computer hardware, an operating system to the domain or designating the domain for execution of a standalone application; and

generating, using the computer hardware, a platform configured to implement the plurality of domains within the heterogeneous SoC and isolate the plurality of domains from one another, wherein the platform is used to build the embedded applications that execute on the processors assigned to the respective domains.

2. The method of claim 1 , wherein the platform includes configuration data for configuring isolation circuits of the heterogeneous SoC, and wherein the isolation circuits regulate access to the hardware resources included in the respective domains.

3. The method of claim 1 , wherein the platform includes a first stage boot loader configured to initialize a processor system of the heterogeneous SoC.

4. The method of claim 1 , wherein the platform includes, for a selected domain of the plurality of domains, a device tree for the operating system assigned to the selected domain, wherein the device tree is generated based upon the hardware resource selected from the plurality of hardware resources.

5. The method of claim 1 , wherein the platform includes drivers for the hardware resources included in the respective domains, wherein the drivers correspond to the operating system or the standalone application of the respective domain.

6. The method of claim 1 , further comprising:

modifying at least one domain of the plurality of domains for the heterogeneous SoC using the hardware description file.

7. The method of claim 1 , wherein the platform includes a plurality of artifacts for the plurality of domains for use by a software development environment, the method further comprising:

generating executable program code for a selected domain of the plurality of domains using an artifact selected from the plurality of artifacts that corresponds to the selected domain.

8. The method of claim 1 , wherein the platform includes a linker script corresponding to each respective domain.

9. A system, comprising:

a memory configured to store program code; and

a processor coupled to the memory, wherein the processor, in response to executing the program code, is configured to initiate operations including:

receiving a hardware description file specifying a plurality of processors and a plurality of hardware resources of a heterogeneous System-on-Chip (SoC), wherein the plurality of processors are configured to execute program code and are available for use by a design for the SoC, and wherein the plurality of hardware resources are available for use by embedded applications;

based on the hardware description file and received user input, determining a plurality of domains for the heterogeneous SoC, wherein each domain includes a processor selected from the plurality of processors and a hardware resource selected from the plurality of hardware resources;

for each of the plurality of domains, assigning an operating system to the domain or designating the domain for execution of a standalone application; and

generating a platform configured to implement the plurality of domains within the heterogeneous SoC and isolate the plurality of domains from one another, wherein the platform is used to build the embedded applications that execute on the processors assigned to the respective domains.

10. The system of claim 9 , wherein the platform includes configuration data for configuring isolation circuits of the heterogeneous SoC, and wherein the isolation circuits regulate access to the hardware resources included in the respective domains.

11. The system of claim 9 , wherein the platform includes a first stage boot loader configured to initialize a processor system of the heterogeneous SoC.

12. The system of claim 9 , wherein the platform includes, for a selected domain of the plurality of domains, a device tree for the operating system assigned to the selected domain, wherein the device tree is generated based upon the hardware resource selected from the plurality of hardware resources.

13. The system of claim 9 , wherein the platform includes drivers for the hardware resources included in the respective domains, wherein the drivers correspond to the operating system or the standalone application of the respective domain.

14. The system of claim 9 , wherein the processor is configured to initiate operations further comprising:

modifying at least one domain of the plurality of domains for the heterogeneous SoC using the hardware description file.

15. The system of claim 9 , wherein the platform includes a plurality of artifacts for the plurality of domains for use by a software development environment, wherein the processor is configured to initiate operations further comprising:

generating executable program code for a selected domain of the plurality of domains using an artifact selected from the plurality of artifacts that corresponds to the selected domain.

16. The system of claim 9 , wherein the platform includes a linker script corresponding to each respective domain.

17. A computer program product, comprising:

a computer readable storage medium having program code stored thereon, the program code executable by computer hardware to initiate operations including:

receiving a hardware description file specifying a plurality of processors and a plurality of hardware resources of a heterogeneous System-on-Chip (SoC), wherein the plurality of processors are configured to execute program code and are available for use by a design for the SoC, and wherein the plurality of hardware resources are available for use by embedded applications;

based on the hardware description file and received user input, determining a plurality of domains for the heterogeneous SoC, wherein each domain includes a processor selected from the plurality of processors and a hardware resource selected from the plurality of hardware resources;

for each of the plurality of domains, assigning an operating system to the domain or designating the domain for execution of a standalone application; and

generating a platform configured to implement the plurality of domains within the heterogeneous SoC and isolate the plurality of domains from one another, wherein the platform is used to build the embedded applications that execute on the processors assigned to the respective domains.

18. The computer program product of claim 17 , wherein the platform includes configuration data for configuring isolation circuits of the heterogeneous SoC, and wherein the isolation circuits regulate access to the hardware resources included in the respective domains.

19. The computer program product of claim 17 , wherein the platform includes a first stage boot loader configured to initialize a processor system of the heterogeneous SoC.

20. The computer program product of claim 17 , wherein the platform includes, for a selected domain of the plurality of domains, a device tree for the operating system assigned to the selected domain, wherein the device tree is generated based upon the hardware resource selected from the plurality of hardware resources.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2018
From: JAVRE, SOMDUTT; RELE, SIDDHARTH; BUDDE, GANGADHAR; NALI, APPA RAO; KAMARAPU, CHAITANYA
To: XILINX, INC.
Reel/Frame 045579/0302 →
Continuity (1)
Related Publication 20190324806A1 · Oct 24, 2019
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