IP Library Granted Patent US 10,885,877
Granted Patent B2
US 10,885,877 · App. 16/465,301 · Granted Jan 5, 2021

Display system and electronic device

Inventor: Yoshiyuki Kurokawa (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G5/14G06N3/063G06N3/08G09G3/2092G09G3/22G09G3/3688G09G2320/02
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Quick Facts
Patent No.
US 10,885,877
App. No.
16/465,301
Granted
Jan 5, 2021
Kind
B2
Abstract

A novel semiconductor device or display system is provided. The display system includes a correction circuit having a function of correcting an image signal by utilizing artificial intelligence. Specifically, learning by an artificial neural network enables the correction circuit to correct an image signal so as to alleviate the image discontinuity. Then, by making an inference (recognition) utilizing the artificial neural network which has finished the learning, the image signal is corrected and compensation for the image discontinuity can be made. In this manner, the junction can be inconspicuous on the displayed image, improving the quality of a high-resolution image.

Claims (28)

1. A display system comprising:

a signal generation portion configured to generate an image signal;

a display device comprising a first display panel and a second display panel, each of the first display panel and the second display panel comprising a plurality of pixels;

a first source driver circuit and a second source driver circuit configured to supply the image signal to the first display panel and the second display panel, respectively;

a correction circuit comprising a neural network; and

an arithmetic processing device configured to perform neural network learning and to supply a weight coefficient obtained by the learning to the correction circuit,

wherein the neural network is configured to correct the image signal so as to compensate for discontinuity of an image displayed on a boundary between the first display panel and the second display panel, and

wherein the learning is performed by updating the weight coefficient so that a difference between the image signal and a signal corresponding to an image displayed on the display device is equal to or lower than a certain value.

2. A display system comprising:

a signal generation portion configured to generate an image signal;

a display device comprising a first display panel and a second display panel, each of the first display panel and the second display panel comprising a plurality of pixels;

a first source driver circuit and a second source driver circuit configured to supply the image signal to the first display panel and the second display panel, respectively;

a correction circuit comprising a neural network; and

an arithmetic processing device configured to perform neural network learning and to supply a weight coefficient obtained by the learning to the correction circuit,

wherein the neural network is configured to correct the image signal for the pixels in a vicinity of a boundary between the first display panel and the second display panel, and

wherein the learning is performed by updating the weight coefficient so that a difference between the image signal and a signal corresponding to an image displayed on the display device is equal to or lower than a certain value.

3. The display system according to claim 1 ,

wherein the neural network comprises an autoencoder, and

wherein the autoencoder comprises a decoder and an encoder.

4. The display system according to claim 1 , wherein each of the plurality of pixels comprises a transistor comprising amorphous silicon in a channel formation region.

5. The display system according to claim 1 , wherein each of the plurality of pixels comprises a transistor comprising a metal oxide in a channel formation region.

6. An electronic device comprising the display system according to claim 1 .

7. The display system according to claim 2 ,

wherein the neural network comprises an autoencoder, and

wherein the autoencoder comprises a decoder and an encoder.

8. The display system according to claim 2 , wherein each of the plurality of pixels comprises a transistor comprising amorphous silicon in a channel formation region.

9. The display system according to claim 2 , wherein each of the plurality of pixels comprises a transistor comprising a metal oxide in a channel formation region.

10. An electronic device comprising the display system according to claim 2 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2019
From: KUROKAWA, YOSHIYUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 049321/0382 →
Priority Claims (2)
JP 2017-008039 · Jan 20, 2017 · national
JP 2017-008040 · Jan 20, 2017 · national
Continuity (1)
Related Publication 20190348011A1 · Nov 14, 2019
Cited By (1)
US 12,389,608