Circuit stage credit based approaches to static timing analysis of integrated circuits
The present embodiments relate to static timing analysis (STA) of circuits. The STA can include determining graph based analysis (GBA) delays of timing paths within the circuit. Path based analysis (PBA) delays of a subset of timing paths can be determined to generate circuit stage credit values for circuit stages in the circuit. The circuit stage credit values can be used to adjust GBA delays of the timing paths. Prediction functions can be utilized to predict or estimate PBA delays of timing paths thereby avoiding the determination of actual PBA delays of the timing paths.
1. A method, comprising:
determining graph based analysis (GBA) delays for a plurality of timing paths in a netlist of a circuit;
selecting a first timing path from the plurality of timing paths, the first timing path including a first set of circuit stages;
accessing a circuit stage credit database to determine availability of circuit stage credit values associated with at least one circuit stage from the first set of circuit stages, the circuit stage credit value of an N-th circuit stage of the first timing path determined according to a PBA delay of first N circuit stages of the first timing path and a GBA delay of remaining circuit stages of the first timing path; and
based on a determination of availability of circuit stage credit values, predicting a predicted PBA slack for the first timing path.
2. The method of claim 1 , further comprising:
selecting a second timing path from the plurality of timing paths, the second timing path including a second set of circuit stages;
accessing the circuit stage credit database to determine availability of circuit stage credit values associated with at least one circuit stage from the second set of circuit stages;
based on a determination of unavailability of circuit stage credit values associated with at least one circuit stage from the second set of circuit stages:
determining a PBA delay for each circuit stage in the second set of circuit stages;
determining a circuit stage credit value associated with at least one circuit stage of the second set of circuit stages based on a change in the GBA delay of the second timing path based on the PBA delay of the respective circuit stage; and
updating the circuit stage credit database based on the circuit stage credit value associated with the at least one circuit stage of the second set of circuit stages.
3. The method of claim 2 , further comprising:
updating the circuit stage credit database to include, in association with the at least one circuit stage, at least one attribute associated with the second timing path.
4. The method of claim 2 , further comprising:
determining the circuit stage credit value associated with the at least one circuit stage of the second set of circuit stages for one input/output timing arc of a plurality of input/output timing arcs of the at least one circuit stage.
5. The method of claim 4 , further comprising:
determining the circuit stage credit value associated with the at least one circuit stage of the second set of circuit stages additionally for unateness of the one input/output timing arc.
6. The method of claim 2 , further comprising:
determining a partial PBA delay of the second timing path based on a PBA delay of a circuit stage and the GBA delays of the remainder of circuit stages in the second timing path;
determining a partial PBA slack based on a difference between the partial PBA delay and a required arrival time of the second timing path;
equating the circuit stage credit value to a difference between the partial PBA slack and the GBA slack of the second timing path.
7. The method of claim 1 , further comprising:
predicting the predicted PBA slack for the first timing path based additionally on path attributes of the first timing path.
8. The method of claim 1 , further comprising:
predicting the predicted PBA slack based on a prediction function, the prediction function generating the predicted PBA slack of the first timing path based on circuit stage credit values of each circuit stage in the first timing path available in the circuit stage credit database and path attributes associated with the circuit stage credit values.
9. The method of claim 8 , further comprising:
generating the prediction function based on linear regression carried out on circuit stage credit values and the associated path attributes stored in the circuit stage credit database.
10. The method of claim 9 , wherein the associated path attributes include at least one of a path arrival time, a spatial distance of the timing path, a multi-fanin stage count, multi-fanout stage count, and a bumpy stage count.
11. The method of claim 2 , further comprising:
updating the circuit stage credit value associated with a circuit stage with a lower of the existing circuit stage credit value in the circuit stage credit database and a new circuit stage credit value.