IP Library › Granted Patent US 10,937,731
Granted Patent B2
US 10,937,731 · App. 16/318,194 · Granted Mar 2, 2021

Semiconductor module and method for manufacturing semiconductor module

Inventors: Tomohisa Suzuki (Tokyo, JP); Takeshi Terasaki (Tokyo, JP)
Assignee: HITACHI, LTD.
H01L23/5226H01L23/48H01L24/33H01L25/07H01L25/072H01L25/18H01L25/50H01L29/1608
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Quick Facts
Patent No.
US 10,937,731
App. No.
16/318,194
Granted
Mar 2, 2021
Kind
B2
Abstract

Provided is a semiconductor module enabling to effectively reduce, with a relatively simple structure, a thermal strain occurring in a bonding section between a semiconductor chip and other conductor members. The semiconductor module is characterized by being provided with: a first wiring layer; a semiconductor element bonded on the first wiring layer via a first bonding layer; a first electrode bonded on the semiconductor element via a second bonding layer; a second electrode connected on the first electrode; and a second wiring layer connected on the second electrode. The semiconductor module is also characterized in that: the width of the second electrode, said width being in the short-side direction, is more than the thickness of the first electrode; and the second electrode is disposed at a position off the center position of the semiconductor element.

Claims (60)

1. A semiconductor module comprising:

a first wiring layer;

a semiconductor element bonded to the first wiring layer via a first bonding layer;

a first electrode bonded to the semiconductor element via a second bonding layer;

a second electrode having an end portion connected to the first electrode, the end portion of the second electrode having a first dimension in a first direction and a second dimension in a second direction perpendicular to the first direction, the first dimension being less than the second dimension, the second electrode having a length in a third direction perpendicular to the first and second directions; and

a second wiring layer connected to the second electrode,

wherein the first dimension of the second electrode is greater than a thickness of the first electrode in the third direction, and

wherein the second electrode is disposed at a position spaced apart from a center position of the semiconductor element.

2. The semiconductor module according to claim 1 ,

wherein the second electrode is a slit-shaped electrode.

3. The semiconductor module according to claim 2 , further comprising another second electrode,

wherein both ends of the first electrode along the first direction are respectively connected to the second electrode and the another second electrode with the center position of the semiconductor element positioned between the both ends of the first electrode.

4. The semiconductor module according to claim 1 ,

wherein at least one of the first bonding layer and the second bonding layer is formed of sintered metal obtained by sintering metal particles.

5. The semiconductor module according to claim 1 ,

wherein the first electrode is a conductive member containing copper as a main component, and

wherein the second bonding layer is formed of sintered copper.

6. The semiconductor module according to claim 1 ,

wherein the first electrode and the second electrode are connected via a third bonding layer.

7. The semiconductor module according to claim 1 ,

wherein the first electrode and the second electrode are formed of an integral conductive member.

8. The semiconductor module according to claim 1 ,

wherein the second electrode and the second wiring layer are connected via a fourth bonding layer.

9. The semiconductor module according to claim 1 ,

wherein a plurality of semiconductor elements are disposed in one same semiconductor module.

10. The semiconductor module according to claim 9 ,

wherein the second electrode is provided so as to be line-symmetrical with the center position in a long-side direction of the semiconductor module as a symmetry axis.

11. The semiconductor module according to claim 10 ,

wherein in one of two regions separated by the symmetry axis, the second electrode is provided so as to be line-symmetrical with another adjacent second electrode in the long-side direction of the semiconductor module.

12. The semiconductor module according to claim 9 ,

wherein a third electrode is provided between the second electrode and the second wiring layer, and

wherein at least two or more second electrodes are connected to the third electrode.

13. The semiconductor module according to claim 12 ,

wherein the second electrode and the third electrode are connected via a fifth bonding layer.

14. The semiconductor module according to claim 13 ,

wherein the third electrode and the second wiring layer are connected via a sixth bonding layer.

15. A method for manufacturing a semiconductor module comprising:

(a) a step of bonding a semiconductor element to a first wiring layer via a first bonding layer;

(b) a step of bonding a first electrode to the semiconductor element via a second bonding layer;

(c) a step of disposing an end portion of a second electrode and a spacer on the first electrode, the end portion of the second electrode having a first dimension in a first direction and a second dimension in a second direction perpendicular to the first direction, the first dimension being less than the second dimension, the second electrode having a length in a third direction perpendicular to the first and second directions;

(d) a step of forming a second wiring layer on the second electrode and the spacer; and

(e) a step of applying pressure from above the second wiring layer,

wherein the first dimension of the second electrode is greater than a thickness of the first electrode in the third direction, and

wherein the second electrode is disposed at a position spaced apart from a center position of the semiconductor element.

16. The method for manufacturing the semiconductor module according to claim 15 , further comprising:

(f) a step of removing the spacer after step (e).

17. The method for manufacturing the semiconductor module according to claim 16 ,

wherein the second electrode and the spacer are formed of the same material.

18. The method for manufacturing the semiconductor module according to claim 15 ,

wherein the spacer is formed of the same material as a sealing member that seals a gap between the first wiring layer and the second wiring layer.

19. The method for manufacturing the semiconductor module according to claim 15 ,

wherein at least one of the first bonding layer and the second bonding layer is formed of sintered metal obtained by sintering metal particles.

20. A semiconductor module comprising:

a first wiring layer;

a semiconductor element bonded to the first wiring layer via a first bonding layer;

a first electrode bonded to the semiconductor element via a second bonding layer;

a plurality of second electrodes having first end portions connected to the first electrode, the first end portions of the second electrodes having first diameters and the second electrodes having lengths in a direction perpendicular to the first end portions of the second electrodes; and

a second wiring layer connected to the second electrode,

wherein the first diameters of the first end portions of the second electrodes are greater than a thickness of the first electrode in the direction perpendicular to the first end portions of the second electrodes, and

wherein the second electrodes are disposed at a position spaced apart from a center position of the semiconductor element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2019
From: SUZUKI, TOMOHISA; TERASAKI, TAKESHI
To: HITACHI, LTD.
Reel/Frame 048030/0272 →
Priority Claims (1)
JP JP2016-147038 · Jul 27, 2016 · national
Continuity (1)
Related Publication 20190287896A1 · Sep 19, 2019