Active matrix substrate, liquid crystal display device, organic electroluminescent display device and method for producing active matrix substrate
An active matrix substrate ( 100 ) according to an embodiment of the present invention has a display region (DR) defined by a plurality of pixel regions (P) arranged in a matrix pattern, and a peripheral region (FR) located around the display region. The active matrix substrate includes a substrate ( 1 ), a first TFT ( 10 ) supported on the substrate and including a crystalline silicon semiconductor layer ( 11 ), and a second TFT ( 20 ) supported on the substrate and including an oxide semiconductor layer ( 21 ). The first TFT and the second TFT each have a top gate structure. The oxide semiconductor layer is located below the crystalline silicon semiconductor layer.
1. An active matrix substrate including a display region defined by a plurality of pixel regions arranged in a matrix pattern, and a peripheral region located around the display region, the active matrix substrate comprising:
a substrate;
a first thin-film transistor (TFT) supported on the substrate and including a crystalline silicon semiconductor layer; and
a second TFT supported on the substrate and including an oxide semiconductor layer, wherein:
each of the first TFT and the second TFT has a top gate structure;
the oxide semiconductor layer is located below the crystalline silicon semiconductor layer,
the first TFT includes:
the crystalline silicon semiconductor layer;
a first gate insulating layer provided on the crystalline silicon semiconductor layer;
a first gate electrode provided on the first gate insulating layer and opposing the crystalline silicon semiconductor layer with the first gate insulating layer interposed therebetween; and
a first source electrode and a first drain electrode electrically connected to the crystalline silicon semiconductor layer; and
the second TFT includes:
the oxide semiconductor layer;
a second gate insulating layer provided on the oxide semiconductor layer;
a second gate electrode provided on the second gate insulating layer and opposing the oxide semiconductor layer with the second gate insulating layer interposed therebetween; and
a second source electrode and a second drain electrode electrically connected to the oxide semiconductor layer,
the second gate insulating layer of the second TFT includes a lower gate insulating layer, and an upper gate insulating layer located on the lower gate insulating layer, and
the first gate insulating layer of the first TFT is in a same layer as the upper gate insulating layer of the second TFT.
2. The active matrix substrate according to claim 1 , wherein the crystalline silicon semiconductor layer is provided on an insulating layer that is in a same layer as the lower gate insulating layer of the second TFT.
3. The active matrix substrate according to claim 1 , wherein the first gate electrode of the first TFT and the second gate electrode of the second TFT are in a same layer.
4. The active matrix substrate according to claim 1 , wherein, wherein:
the first TFT is arranged in the peripheral region; and
the second TFT is arranged in the display region.
5. The active matrix substrate according to claim 1 , wherein:
the first TFT is arranged in the display region; and
the second TFT is arranged in the peripheral region.
6. The active matrix substrate according to claim 1 , wherein the oxide semiconductor layer includes an In—Ga—Zn—O-based semiconductor.
7. The active matrix substrate according to claim 6 , wherein the In—Ga—Zn—O-based semiconductor includes a crystalline portion.
8. A liquid crystal display device comprising the active matrix substrate according to claim 1 .
9. An organic electroluminescent display device comprising the active matrix substrate according to claim 1 .
10. The active matrix substrate according to claim 1 , further comprising:
an interlayer insulating layer covering the second gate electrode, the second gate insulating layer, and the oxide semiconductor layer, wherein
the interlayer insulating layer includes a portion that is in contact with the oxide semiconductor layer.