IP Library › Granted Patent US 12,342,624
Granted Patent B2
US 12,342,624 · App. 18/175,234 · Granted Jun 24, 2025

Display apparatus

Inventors: So-Young Noh (Goyang-si, KR); Ki-Tae Kim (Seoul, KR); Kyeong-Ju Moon (Paju-si, KR); Hyuk Ji (Paju-si, KR); Jin-Kyu Roh (Gimcheon-si, KR); Jung-Doo Jin (Gumi-si, KR); Kye-Chul Choi (Seoul, KR); Dong-Yup Kim (Gimpo-si, KR); Chan-Ho Kim (Paju-si, KR)
Assignee: LG Display Co., Ltd.
H10D86/60H10D86/423H10D86/431H10K59/12
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Quick Facts
Patent No.
US 12,342,624
App. No.
18/175,234
Granted
Jun 24, 2025
Kind
B2
Abstract

A display apparatus includes an oxide semiconductor pattern disposed on a device substrate and including a channel region disposed between a source region and a drain region, a gate electrode overlapping the channel region of the oxide semiconductor pattern and having a structure in which a first hydrogen barrier layer and a gate conductive layer are stacked, and a gate insulating film disposed between the oxide semiconductor pattern and the gate electrode to expose the source region and the drain region of the oxide semiconductor pattern. The gate electrode exposes a portion of the gate insulating film that is adjacent to the source region and a portion of the gate insulating film that is adjacent to the drain region.

Claims (26)

1. A display apparatus comprising;

a driving circuit in a pixel of a substrate, the driving circuit including a first thin film transistor and a second thin film transistor; and

a light-emitting device in the pixel of the substrate, the light-emitting device electrically connected to the driving circuit,

wherein a first semiconductor pattern of the first thin film transistor includes an oxide semiconductor,

wherein the first semiconductor pattern includes a first channel region between a first source region and a first drain region,

wherein each of the first source region and the first drain region extends from the first channel region in an inclined direction with respect to a lower surface of the first channel region, such that a lower surface of the first source region and a lower surface of the first drain region opposite to the first channel region are disposed closer to the substrate than the lower surface of the first channel region, and

wherein the first thin film transistor includes a first source electrode connected to the first source region and a first drain electrode connected to the first drain region,

wherein each of the first source electrode and the first drain electrode is formed with a plurality of inclined steps.

2. The display apparatus according to claim 1 , wherein the first source region has a shape symmetrical to the first drain region, with respect to the first channel region.

3. The display apparatus according to claim 1 , wherein a second semiconductor pattern of the second thin film transistor includes a different material from the first semiconductor pattern of the first thin film transistor.

4. The display apparatus according to claim 3 , wherein the second semiconductor pattern of the second thin film transistor includes low temperature poly-silicon (LTPS).

5. The display apparatus according to claim 3 , wherein the second semiconductor pattern is disposed on a different layer from the first semiconductor pattern.

6. The display apparatus according to claim 5 , further comprising a buffer layer on the second semiconductor pattern,

wherein the buffer layer includes silicon nitride (SiNx), and

wherein the first semiconductor pattern is disposed on the buffer layer.

7. The display apparatus according to claim 5 , further comprising an interlayer insulating film on the first semiconductor pattern,

wherein the first source electrode and the first drain electrode on the interlayer insulating film, and

wherein the second thin film transistor includes a second source electrode and a second drain electrode on the interlayer insulating film.

8. The display apparatus according to claim 7 , wherein the second source electrode and the second drain electrode of the second thin film transistor are disposed on a same layer as the first source electrode and the first drain electrode of the first thin film transistor.

9. The display apparatus according to claim 1 , further comprising a conductive pattern between the substrate and the first semiconductor pattern of the first thin film transistor,

wherein the first source region and the first drain region of the first semiconductor pattern are disposed outside the conductive pattern.

10. The display apparatus according to claim 9 , wherein the second thin film transistor includes a second gate electrode disposed on a same layer as the conductive pattern.

11. The display apparatus according to claim 9 , wherein the conductive pattern overlaps the first channel region.

12. The display apparatus according to claim 11 , wherein a distance between the first source region and the first drain region increases as a distance from the lower surface of the first channel region increases.

13. The display apparatus according to claim 1 , wherein each of the first source region and the first drain region includes a stepped portion.

14. The display apparatus according to claim 1 , wherein the first channel region has a flat shape parallel to the substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2023
From: NOH, SO-YOUNG; KIM, KI-TAE; MOON, KYEONG-JU; ROH, JIN-KYU; JIN, JUNG-DOO; CHOI, KYE-CHUL; KIM, DONG-YUP; KIM, CHAN-HO
To: LG DISPLAY CO., LTD.
Reel/Frame 062827/0727 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2023
From: JI, HYUK
To: LG DISPLAY CO., LTD.
Reel/Frame 062827/0751 →
Priority Claims (2)
KR 10-2019-0080636 · Jul 4, 2019 · national
KR 10-2019-0180098 · Dec 31, 2019 · national
Continuity (2)
Continuation 16920467 · Jul 3, 2020
Related Publication 20230207570A1 · Jun 29, 2023
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