IP Library › Granted Patent US 10,942,216
Granted Patent B2
US 10,942,216 · App. 15/958,387 · Granted Mar 9, 2021

Apparatus and method for testing an interconnect circuit and method for manufacturing a semiconductor device including the test method

Inventors: Sung-Yeol Kim (Yongin-si, KR); Jae-Hong Kim (Seoul, KR); Kyung-Min Lee (Gwacheon-si, KR); Mee-Hyun Lim (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G01R31/2853G01N21/8806G01N21/9501G01R1/071G02F1/1309
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Quick Facts
Patent No.
US 10,942,216
App. No.
15/958,387
Granted
Mar 9, 2021
Kind
B2
Abstract

An interconnect circuit testing apparatus including: an electric signal generating circuit for generating an electric signal; a first electrode arranged at a first region of a substrate, wherein the substrate includes an interconnect circuit, an upper surface and a lower surface; a second electrode arranged at a second region of the substrate; and a sensor for detecting an electric field emitted from the first region or the second region when the electric signal is applied to the substrate through the first electrode and the second electrode.

Claims (35)

1. An interconnect circuit testing apparatus, comprising:

an electric signal generating circuit for generating an electric signal;

a first electrode arranged at a first region of a substrate, wherein the substrate includes an interconnect circuit, an upper surface and a lower surface;

a second electrode arranged at a second region of the substrate; and

a sensor for detecting an electric field emitted from the first region or the second region when the electric signal is applied to the substrate through the first electrode and the second electrode, wherein the electric signal is applied to the substrate through the first electrode when the first electrode is not in contact with the substrate.

2. The interconnect circuit testing apparatus of claim 1 ,

wherein the first electrode or the second electrode is flat plate-shaped, and

wherein the first electrode and the second electrode are arranged adjacent to the upper surface or the lower surface of the substrate, or the substrate is arranged between the first electrode and the second electrode.

3. The interconnect circuit testing apparatus of claim 1 , wherein the sensor includes a current meter, and

wherein the sensor detects the electric field by using antennas and measures current corresponding to the electric field with the current meter.

4. The interconnect circuit testing apparatus of claim 1 , wherein the sensor includes an electro-optic crystal; and

wherein the electro-optic crystal is arranged between the substrate and the first electrode or between the substrate and the second electrode, and a reflecting plate is formed on a surface of the electro-optic crystal that faces the substrate, and

wherein a refractive index of the electro-optic crystal changes or, a direction of crystals in the electro-optic crystal changes in accordance with an intensity of the electric field.

5. The interconnect circuit testing apparatus of claim 4 , wherein the first electrode or the second electrode adjacent to the electro-optic crystal is transparent,

wherein the sensor comprises:

the electro-optic crystal;

an illuminating unit for generating light;

an optical device for making the light from the illuminating unit incident on the electro-optic crystal and making the light reflected from the electro-optic crystal incident on an electro-optic converter; and

the electro-optic converter for converting the light incident from the optical device into an electric signal,

wherein the first electrode or the second electrode is arranged between the electro-optic crystal and the optical device.

6. The interconnect circuit testing apparatus of claim 1 , wherein the sensor covers the entire first region, the entire second region, a part of the first region or a part of the second region;

wherein, when the sensor covers a part of the first or second region, the sensor detects the electric field by scanning the first region or the second region.

7. The interconnect circuit testing apparatus of claim 1 , wherein the first electrode, the second electrode, or the sensor is separate from the substrate.

8. The interconnect circuit testing apparatus of claim 1 , further comprising:

a signal processing unit for calculating an intensity of the electric field at a pad and a resistance value of a corresponding interconnect from detected electric field data from the sensor; and

a determining unit for determining whether the interconnect circuit is normal based on the intensity of the electric field and the resistance value.

9. An interconnect circuit testing apparatus, comprising:

a first electrode disposed at a first region of an interconnect circuit board;

a second electrode disposed at a second region of the interconnect circuit board, wherein the first electrode and the second electrode each have a flat plate shape;

an electric signal generating circuit for generating an electric signal and applying the electric signal to the first and second electrodes, wherein an electric field is emitted from the interconnect circuit board in response to a potential difference between the first and second electrodes; and

a sensor disposed at the second region of the interconnect circuit board, wherein the sensor detects an intensity of the electric field.

10. The interconnect circuit testing apparatus of claim 9 , wherein the first electrode and the second electrode are disposed at opposite sides of the interconnect circuit board.

11. The interconnect circuit testing apparatus of claim 9 , wherein the first electrode and the second electrode are disposed at the same side of the interconnect circuit board.

12. The interconnect circuit testing apparatus of claim 9 , wherein the sensor is disposed between the second electrode and the interconnect circuit board.

13. The interconnect circuit testing apparatus of claim 9 , wherein the second electrode is a transparent electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2018
From: KIM, SUNG-YEOL; KIM, JAE-HONG; LEE, KYUNG-MIN; LIM, MEE-HYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 045599/0648 →
Priority Claims (1)
KR 10-2017-0132750 · Oct 12, 2017 · national
Continuity (1)
Related Publication 20190113565A1 · Apr 18, 2019