IP Library › Granted Patent US 10,951,178
Granted Patent B2
US 10,951,178 · App. 16/586,711 · Granted Mar 16, 2021

Averaging overcurrent protection

Inventors: David Steven Ripley (Marion, IA); Joshua James Caron (Madison, NC); Vinay Kundur (San Jose, CA); Wei Zhang (Oak Park, CA)
Assignee: Skyworks Solutions, Inc.
H03F1/52H03F1/0211H03F3/213H03F2200/387H03F2200/426H03F2200/451
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Quick Facts
Patent No.
US 10,951,178
App. No.
16/586,711
Granted
Mar 16, 2021
Kind
B2
Abstract

In some embodiments, a power amplification system can comprise a current source configured to provide a bias current, a current mirror configured to mirror the bias current, a comparator configured to compare the mirrored bias current to a threshold current, and a transistor at an output of the comparator. The transistor can be configured to be activated in response to the mirrored bias current exceeding the threshold current.

Claims (33)

1. A power amplification system comprising:

a current source configured to provide a bias current;

a current mirror configured to mirror the bias current;

a comparator configured to compare the mirrored bias current to a threshold current; and

a transistor at an output of the comparator, the transistor configured to be activated in response to the mirrored bias current exceeding the threshold current.

2. The power amplification system of claim 1 wherein the bias current represents an average current received at the power amplification system.

3. The power amplification system of claim 1 wherein the threshold current is temperature-compensated to correct for current gain variation.

4. The power amplification system of claim 1 wherein the current source is configured to trim the threshold current value independently for each band of the power amplification system.

5. The power amplification system of claim 1 wherein the current mirror includes a first current mirror providing a 50:1 current ratio, a second current mirror providing a 2:1 current ratio, and a third current mirror providing a 2:1 current ratio.

6. The power amplification system of claim 1 further comprising a converter configured to generate the threshold current.

7. The power amplification system of claim 1 further comprising a capacitor configured to integrate error current from the comparator, the capacitor configured to build charge in response to the mirrored bias current exceeding the threshold current value.

8. The power amplification system of claim 7 wherein the capacitor is configured to reset when there is a mode change.

9. The power amplification system of claim 8 wherein the capacitor is in series with a switch to ground.

10. The power amplification system of claim 7 further comprising an edge counter.

11. The power amplification system of claim 10 wherein each of the comparator, the transistor, the edge counter, and the capacitor are integrated on a first circuit die.

12. The power amplification system of claim 1 wherein the current source is a regulator.

13. The power amplification system of claim 1 wherein the current source provides the bias current to an output stage of the power amplification system.

14. A method of managing current in a power amplifier, the method comprising:

providing a bias current to the power amplifier;

mirroring the bias current at an output stage of the power amplifier;

applying the mirrored bias current to a filter network to create a filtered voltage waveform;

comparing a sensed voltage to a threshold voltage; and

in response to the sensed voltage exceeding the threshold voltage, activating a transistor to redirect at least a portion of the bias current away from the power amplifier.

15. The method of claim 14 wherein redirecting the bias current causes reduction of a gain value of the power amplifier; reduction of the gain value causes reduction of output power of the power amplifier; and reduction of output power causes reduction of final stage base current of the power amplifier.

16. The method of claim 14 wherein the bias current represents an average current received at the power amplifier.

17. The method of claim 14 wherein the threshold voltage is temperature-compensated to correct for gain variation.

18. The method of claim 14 wherein mirroring the bias current includes applying the bias current to a current mirror having a first current mirror providing a 50:1 current ratio, a second current mirror providing a 2:1 current ratio, and a third current mirror providing a 2:1 current ratio.

19. The method of claim 14 further comprising integrating error current to build a charge on capacitor in response to the sensed voltage exceeding the threshold voltage.

20. A circuit comprising:

a current source configured to provide a bias current;

a current mirror configured to mirror the bias current;

a comparator configured to compare the mirrored bias current to a threshold current; and

a transistor at an output of the comparator, the transistor configured to be activated in response to the mirrored bias current exceeding the threshold current.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2021
From: RIPLEY, DAVID STEVEN; CARON, JOSHUA JAMES; KUNDUR, VINAY; ZHANG, WEI
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 055197/0409 →
Continuity (2)
Provisional Application 62738928 · Sep 28, 2018
Related Publication 20200106399A1 · Apr 2, 2020
Cited By (4)
US 12,456,963 US 12,597,890 US 12,603,634 US 12,609,670