Atomic layer deposition for low-K trench protection during etch
An atomic layer deposition (ALD) technique is used to deposit one or more layers on hard mask layers and the sidewalls of low-K dielectric trench as part of the trench etch process. The ALD layer(s) can prevent the hard mask from being eroded during various hard mask open processes. Further, the ALD layer(s) may be utilized to prevent the low-K dielectric sidewall from being laterally etched during the low-K dielectric trench etch. Hence, better control of the trench profile and better critical dimension control may be provided.
1. A method of etching a substrate to form a trench, the method comprising:
providing a first patterned feature on the substrate;
providing a low-k dielectric layer on the substrate, the low-k dielectric layer underlying the first patterned feature;
etching a first portion of the low-k dielectric layer according a trench pattern formed by the first patterned feature;
after etching the first portion of the low-k dielectric layer, forming a first sidewall layer on exposed sidewall surfaces of the low-k dielectric layer, the forming the first sidewall layer being performed by an first atomic layer deposition process;
after forming the first sidewall layer on exposed sidewall surfaces of the low-k dielectric layer, performing a second etching of the low-k dielectric layer according to the trench pattern, the first sidewall layer protecting sidewalls of the low-k dielectric layer during the second etching of the low-k dielectric layer; and
forming a patterned feature sidewall layer on at least sidewalls of the patterned feature, the patterned feature sidewall layer being performed by an initial atomic layer deposition process, the patterned feature sidewall layer being performed before the etching a first portion of the low-k dielectric layer.
2. The method of claim 1 , wherein after the second etching of the low-k dielectric layer, forming a second sidewall layer on exposed sidewall surfaces of the low-k dielectric layer, the forming the second sidewall layer being performed by a second atomic layer deposition process.
3. The method of claim 2 , wherein after forming the second sidewall layer on exposed sidewall surfaces of the low-k dielectric layer, performing a third etching of the low-k dielectric layer according to the trench pattern, the second sidewall layer protecting sidewalls of the low-k dielectric layer during the third etching of the low-k dielectric layer.
4. The method of claim 3 , wherein after the third etching of the low-k dielectric layer, forming a third sidewall layer on exposed sidewall surfaces of the low-k dielectric layer, the forming the third sidewall layer being performed by a third atomic layer deposition process.
5. The method of claim 4 , wherein after forming the third sidewall layer on exposed sidewall surfaces of the low-k dielectric layer, performing a fourth etching of the low-k dielectric layer according to the trench pattern, the third sidewall layer protecting sidewalls of the low-k dielectric layer during the fourth etching of the low-k dielectric layer.
6. The method of claim 5 , wherein the first sidewall layer, the second sidewall layer and the third sidewall layer are formed of a same material.
7. The method of claim 6 , wherein the same material is silicon oxide or silicon nitride.
8. A method of etching a substrate to form a trench, the method comprising:
providing a first patterned feature on the substrate;
providing a low-k dielectric layer on the substrate, the low-k dielectric layer underlying the first patterned feature;
providing an initial sidewall layer on at least sidewalls of the first patterned feature;
after providing the initial sidewall layer on at least sidewalls of the first patterned feature, etching a first portion of the low-k dielectric layer according a trench pattern formed by the first patterned feature; and
after etching the first portion of the low-k dielectric layer, performing a cyclic process of forming sidewall layers on exposed sidewall surfaces of the low-k dielectric layer by an atomic layer deposition process and then further etching the low-k dielectric layer until the trench is formed in the low-k dielectric layer, the forming sidewall layers on exposed sidewall surfaces protecting sidewalls of the low-k dielectric layer during the further etching of the low-k dielectric layer.
9. The method of claim 8 , wherein the initial sidewall layer on at least sidewalls of the first patterned feature and the sidewall layers on exposed sidewall surfaces of the low-k dielectric layer are formed of a same material.
10. The method of claim 8 , wherein the initial sidewall layer on at least sidewalls of the first patterned feature and the sidewall layers on exposed sidewall surfaces of the low-k dielectric layer are formed of silicon oxide or silicon nitride.
11. The method of claim 8 wherein at least two cycles of the cyclic process occur.
12. The method of claim 11 , wherein the sidewalls formed during the cyclic process are all formed of a same material.
13. The method of claim 12 , wherein the same material is silicon oxide or silicon nitride.
14. A method of etching a substrate to form a trench, the method comprising:
providing a hard mask layer on the substrate;
providing a first patterned feature on the substrate, the first patterned feature being located above the hard mask layer;
providing a low-k dielectric layer on the substrate, the low-k dielectric layer being located under the hard mask layer;
providing a first sidewall layer on at least sidewalls of the first patterned feature via a first atomic layer deposition process;
after providing the first sidewall layer on at least the sidewalls of the first patterned feature, etching the hard mask layer according to a trench pattern formed by the first patterned feature, the etching the hard mask layer replicating the trench pattern in the hard mask layer and exposing sidewalls of the hard mask layer;
providing a second sidewall layer on at least the sidewalls of the hard mask layer via a second atomic layer deposition process;
after providing the second sidewall layer on at least sidewalls of the hard mask layer, etching a portion of the low-k dielectric layer according to the trench pattern replicated in the hard mask layer; and
after etching the portion of the low-k dielectric layer, performing a cyclic process of forming sidewall layers on exposed sidewall surfaces of the low-k dielectric layer by additional atomic layer deposition processes and then further etching the low-k dielectric layer until the trench is formed in the low-k dielectric layer, the forming sidewall layers on exposed sidewall surfaces of the low-k dielectric layer protecting sidewalls of the low-k dielectric layer during the further etching of the low-k dielectric layer.
15. The method of claim 14 , wherein the trench aligns with a metallization layer.
16. The method of claim 14 , wherein the sidewall layers on exposed sidewall surfaces of the low-k dielectric layer are all formed of a first material.
17. The method of claim 16 , wherein the first material is SiO2 or SiN.
18. The method of claim 17 , wherein the first sidewall layer and the second sidewall layer are both formed of the first material.
19. The method of claim 14 , wherein at least one of the first sidewall layer, the second sidewall layer, or the sidewall layers on exposed sidewall surfaces of the low-k dielectric layer are formed as a composite sidewall layer utilizing a first ALD method and a second ALD method, the first ALD method forming a lower composite sidewall layer and the second ALD method forming an upper composite sidewall layer over the lower composite sidewall layer, the first ALD method performed at a lower energy than the second ALD method.