IP Library › Granted Patent US 10,971,542
Granted Patent B2
US 10,971,542 · App. 16/564,254 · Granted Apr 6, 2021

Method of forming a semiconductor device

Inventors: Stephen Forrest (Ann Arbor, MI); Xin Xu (Ann Arbor, MI); Christopher Kyle Renshaw (Ann Arbor, MI)
Assignee: The Regents of the University of Michigan
H01L27/14692H01L27/14612H01L27/307H01L27/3253H01L51/0021H01L51/0097H05K13/046H01L27/14609H01L51/0022H01L2251/5338Y02E10/549Y10T29/4913Y10T29/49128
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Quick Facts
Patent No.
US 10,971,542
App. No.
16/564,254
Granted
Apr 6, 2021
Kind
B2
Abstract

Systems and methods including bonding two or more separately formed circuit layers are provided using, for example, cold welding techniques. Processing techniques may be provided for combining inorganic and/or organic semiconductor devices in apparatus including, for example, microchips, optoelectronic devices, such as solar cells, photodetectors and organic light emitting diodes (OLEDs), and other apparatus with multi-layer circuitry. Methods of bonding preformed circuit layers may include the use of stamping and pressure bonding contacts of two or more circuit layers together. Such methods may find applicability, for example, in bonding circuitry to shaped substrates, including various rounded and irregular shapes, and may be used to combine devices with different structural properties, e.g. from different materials systems.

Claims (18)

1. A method of forming an electrical circuit structure comprising:

providing a first circuit layer including a plurality of first contacts;

constructing a second circuit layer with the steps of:

positioning one or more semiconductor devices on a second substrate;

positioning a plurality of third contacts on the semiconductor devices;

stamping the third contacts to at least one interconnect line;

removing the second substrate; and

positioning a plurality of second contacts on the opposite side of the semiconductor devices from the third contacts;

positioning the second circuit layer on a stamp; and

bonding the plurality of second contacts to the plurality of first contacts via a pressure applied by the stamp.

2. The method of claim 1 , wherein the first circuit layer is disposed on a non-developable surface.

3. The method of claim 2 , further comprising aligning the second contacts at least partially around the non-developable surface in three dimensions such that the second contacts are aligned with the plurality of first contacts before the bonding.

4. The method of claim 1 , wherein the bonding includes cold welding.

5. The method of claim 1 , further comprising providing a circuit sublayer under the first circuit layer and disposing a photodiode material between the circuit sublayer and the first circuit layer.

6. The method of claim 5 , wherein the circuit sublayer is stamped to a first substrate and the photodiode material is disposed over the circuit sublayer by deposition.

7. The method of claim 6 , wherein the first circuit layer is stamped over the photodiode material.

8. The method of claim 7 , wherein the first circuit layer is stamped on a non-developable surface.

9. The method of claim 1 , wherein the one or more semiconductor devices include an array of thin film transistors and the plurality of first contacts are connected to an array of photodiodes.

Continuity (3)
Division 15180537 · Jun 13, 2016
Division 13034776 · Feb 25, 2011
Related Publication 20200168658A1 · May 28, 2020
Cited By (1)
US 12,213,331