Semiconductor device comprising oxide semiconductor
Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.
1. A semiconductor device comprising:
an oxide semiconductor layer including a first region and a pair of second regions;
a source electrode layer and a drain electrode layer over the pair of second regions;
a gate insulating film over the first region, the pair of second regions, the source electrode layer, and the drain electrode layer; and
a gate electrode layer over the gate insulating film and overlapping with the first region,
wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,
wherein a composition ratio of indium is larger than a composition ratio of zinc,
wherein the composition ratio of zinc is larger than a composition ratio of gallium,
wherein each of the composition ratios is represented by atomic percentage,
wherein the pair of second regions includes a dopant and the first region does not include the dopant, and
wherein the dopant is one of phosphorus, arsenic, antimony, boron, aluminum, nitrogen, argon, helium, neon, fluorine, chlorine, and titanium.
2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes a c-axis aligned crystal region.
3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:gallium:zinc=3:1:2.
4. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:gallium:zinc=4:2:3.
5. A semiconductor device comprising:
an oxide semiconductor layer including a first region and a pair of second regions;
a source electrode layer and a drain electrode layer on and in contact with the pair of second regions;
a gate insulating film on and in contact with the first region, the pair of second regions, the source electrode layer, and the drain electrode layer; and
a gate electrode layer on and in contact with the gate insulating film and overlapping with the first region,
wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,
wherein a composition ratio of indium is larger than a composition ratio of zinc,
wherein the composition ratio of zinc is larger than a composition ratio of gallium,
wherein each of the composition ratios is represented by atomic percentage,
wherein the pair of second regions includes a dopant and the first region does not include the dopant, and
wherein the dopant is one of phosphorus, arsenic, antimony, boron, aluminum, nitrogen, argon, helium, neon, fluorine, chlorine, and titanium.
6. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer includes a c-axis aligned crystal region.
7. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:gallium:zinc=3:1:2.
8. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:gallium:zinc=4:2:3.