Solid-state imaging element, electronic apparatus, and semiconductor device
The present technology relates a solid-state imaging element, an electronic apparatus, and a semiconductor device each of which enables deterioration of electrical characteristics in a well region of a semiconductor element formed in a thinned semiconductor substrate to be restrained. A solid-state imaging element as a first aspect of the present technology is a solid-state imaging element constituted by laminating semiconductor substrates in three or more layers, in which of the laminated semiconductor substrates, at least one sheet of the semiconductor substrate is thinned, and an impurity region whose carrier type is the same as that of the thinned semiconductor substrate is formed between a well region and a thinned surface portion in the thinned semiconductor substrate. The present technology can, for example, be applied to a CMOS image sensor.
1. A light detecting device constituted by stacking at least three semiconductor sections, comprising:
a first semiconductor section of the stacked at least three semiconductor sections, wherein the first semiconductor section comprises a pixel region comprising a plurality of photoelectric conversion regions;
a second semiconductor section, of the stacked at least three semiconductor sections, of a first conductivity type comprising a first well region of the first conductivity type, a second well region of a second conductivity type, an impurity region of the first conductivity type, and a wiring layer; and
a third semiconductor section bonded with the second semiconductor section,
wherein the impurity region is disposed between the second well region of the second conductivity type which is different from the first conductivity type, and a bonding surface of the second semiconductor section with one of the first semiconductor section or the third semiconductor section, and
wherein the impurity region is absent between the first well region of the first conductivity type and the bonding surface of the second semiconductor section with one of the first semiconductor section or the third semiconductor section.
2. The light detecting device according to claim 1 , wherein
the second semiconductor section is a P-type substrate,
the impurity region is a P-type region, and
the second well region is an N-type well region.
3. The light detecting device according to claim 1 ,
wherein
the second semiconductor section is an N-type substrate,
the impurity region is an N-type region, and
the second well region is a P-type well region.
4. The light detecting device according to claim 1 , wherein a concentration of the impurity region between the second well region and the bonding surface restricts a depletion layer from extending from one of the first well region or the second well region to reach an interface of the second semiconductor section between both the first well region and the second well region and the bonding surface of the second semiconductor section.
5. The light detecting device according to claim 1 , wherein a through-via is formed in the second semiconductor section.
6. An electronic apparatus equipped with a light detecting device constituted by stacking at least three semiconductor sections,
wherein the light detecting device comprises:
a first semiconductor section of the stacked at least three semiconductor sections, wherein the first semiconductor section comprises a pixel region comprising a plurality of photoelectric conversion regions;
a second semiconductor section, of the stacked at least three semiconductor sections, of a first conductivity type comprising a first well region of the first conductivity type, a second well region of a second conductivity type, an impurity region of the first conductivity type, and a wiring layer; and
a third semiconductor section bonded with the second semiconductor section,
wherein the impurity region is disposed between the second well region of the second conductivity type which is different from the first conductivity type, and a bonding surface of the second semiconductor section with one of the first semiconductor section or the third semiconductor section, and
wherein the impurity region is absent between the first well region of the first conductivity type and the bonding surface of the second semiconductor section with one of the first semiconductor section or the third semiconductor section.
7. A semiconductor device constituted by stacking at least three semiconductor sections, comprising:
a first semiconductor section of the stacked at least three semiconductor sections, wherein the first semiconductor section comprises a pixel region comprising a plurality of photoelectric conversion regions;
a second semiconductor section, of the stacked at least three semiconductor sections, of a first conductivity type comprising a first well region of the first conductivity type, a second well region of a second conductivity type, an impurity region of the first conductivity type, and a wiring layer; and
a third semiconductor section bonded with the second semiconductor section,
wherein the impurity region is disposed between the second well region of the second conductivity type which is different from the first conductivity type, and a bonding surface of the second semiconductor section with one of the first semiconductor section or the third semiconductor section, and
wherein the impurity region is absent between the first well region of the first conductivity type and the bonding surface of the second semiconductor section with one of the first semiconductor section or the third semiconductor section.