IP Library Granted Patent US 11,063,135
Granted Patent B2
US 11,063,135 · App. 15/996,539 · Granted Jul 13, 2021

Semiconductor device and method for fabricating the same

Inventors: Chia-Ming Kuo (Kaohsiung, TW); Po-Jen Chuang (Kaohsiung, TW); Yu-Ren Wang (Tainan, TW); Ying-Wei Yen (Miaoli County, TW); Fu-Jung Chuang (Kaohsiung, TW); Ya-Yin Hsiao (Taipei, TW); Nan-Yuan Huang (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/6656H01L21/0214H01L21/0217H01L21/02167H01L21/26513H01L21/324H01L29/0847H01L29/6659H01L29/66545H01L29/7833H01L21/0206H01L21/28088H01L21/3212H01L21/32133H01L29/42376H01L29/4966H01L29/517H01L29/6653
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Quick Facts
Patent No.
US 11,063,135
App. No.
15/996,539
Granted
Jul 13, 2021
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.

Claims (7)

1. A semiconductor device, comprising:

a gate structure on a substrate;

a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN) and a L-shape;

a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN) and a L-shape;

a third spacer adjacent to the second spacer, wherein the third spacer comprises SiCN and an I-shape;

a fourth spacer adjacent to the third spacer, wherein the fourth spacer contacts the first spacer, the second spacer, and the third spacer directly, top surfaces of the fourth spacer and the gate structure are coplanar, and the fourth spacer is disposed not directly above the gate structure; and

a source/drain region adjacent to two sides of the third spacer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2018
From: KUO, CHIA-MING; CHUANG, PO-JEN; WANG, YU-REN; YEN, YING-WEI; CHUANG, FU-JUNG; HSIAO, YA-YIN; HUANG, NAN-YUAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 045970/0934 →
Priority Claims (1)
CN 201810436649.6 · May 9, 2018 · national
Continuity (1)
Related Publication 20190348520A1 · Nov 14, 2019