Method for making a semiconductor device including a superlattice within a recessed etch
A method for making a semiconductor device may include forming an isolation region adjacent an active region in a semiconductor substrate, and selectively etching the active region so that an upper surface of the active region is below an adjacent surface of the isolation region and defining a stepped edge therewith. The method may further include forming a superlattice overlying the active region. The superlattice may include stacked groups of layers, with each group of layers comprising stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
1. A method for making a semiconductor device comprising:
forming an isolation region adjacent an active region in a semiconductor substrate;
selectively etching the active region so that an upper surface of the active region is below an adjacent surface of the isolation region and defining a stepped edge therewith; and
forming a superlattice overlying the active region, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
2. The method of claim 1 wherein forming the superlattice comprises forming the superlattice to a height of the stepped edge.
3. The method of claim 1 wherein etching comprises in-situ etching with an HCl etchant.
4. The method of claim 1 wherein etching comprises etching for a period in a range of 10 to 250 seconds.
5. The method of claim 1 wherein etching comprises etching to a depth of less than or equal to 400 Å.
6. The method of claim 1 wherein etching comprises ex-situ etching with a wet etch comprising a photoresist developer.
7. The method of claim 6 wherein the photoresist developer comprises tetramethylammonium hydroxide (TMAH).
8. The method of claim 1 wherein etching comprises etching at a temperature in a range of 840-860° C.
9. The method of claim 1 further comprising forming spaced-apart source and drain regions on the semiconductor substrate with the superlattice defining a channel therebetween, and a gate overlying the superlattice.
10. The method of claim 1 wherein the base semiconductor monolayers comprise silicon monolayers.
11. The method of claim 1 wherein the at least one non-semiconductor monolayer comprises oxygen.
12. The method of claim 1 wherein the base semiconductor monolayers comprise germanium.
13. The method of claim 1 wherein the at least one non-semiconductor monolayer comprises at least one of oxygen, nitrogen, fluorine, carbon and carbon-oxygen.
14. A method for making a semiconductor device comprising:
forming an isolation region adjacent an active region in a semiconductor substrate;
selectively etching the active region so that an upper surface of the active region is below an adjacent surface of the isolation region and defining a stepped edge therewith; and
forming a superlattice overlying the active region to a height of the stepped edge, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions; and
forming spaced-apart source and drain regions on the substrate with the superlattice defining a channel therebetween, and a gate overlying the superlattice.
15. The method of claim 14 wherein etching comprises in-situ etching with an HCl etchant.
16. The method of claim 14 wherein etching comprises etching to a depth of less than or equal to 400 Å.
17. The method of claim 14 wherein etching comprises ex-situ etching with a wet etch comprising a photoresist developer.
18. The method of claim 14 wherein etching comprises etching at a temperature in a range of 840-860° C.
19. The method of claim 14 wherein the base semiconductor monolayers comprise silicon monolayers, and the at least one non-semiconductor monolayer comprises oxygen.
20. A method for making a semiconductor device comprising:
forming an isolation region adjacent an active region in a semiconductor substrate;
selectively etching the active region so that an upper surface of the active region is below an adjacent surface of the isolation region and defining a stepped edge therewith; and
forming a superlattice overlying the active region, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions.
21. The method of claim 20 wherein forming the superlattice comprises forming the superlattice to a height of the stepped edge.
22. The method of claim 20 wherein etching comprises in-situ etching with an HCl etchant.
23. The method of claim 20 wherein etching comprises etching to a depth of less than or equal to 400 Å.
24. The method of claim 20 wherein etching comprises ex-situ etching with a wet etch comprising a photoresist developer.