IP Library Granted Patent US 11,081,392
Granted Patent B2
US 11,081,392 · App. 16/559,302 · Granted Aug 3, 2021

Dicing method for stacked semiconductor devices

Inventors: Tsung-Hsing Lu (Hsinchu County, TW); Jun He (Hsinchu, TW); Li-Huan Chu (Hsinchu, TW); Pei-Haw Tsao (Tai-chung, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/78H01L21/3043H01L21/76898H01L24/83H01L24/94H01L25/0657H01L25/50
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Quick Facts
Patent No.
US 11,081,392
App. No.
16/559,302
Granted
Aug 3, 2021
Kind
B2
Abstract

A method includes providing first and second wafers; forming a first device layer in a top portion of the first wafer; forming a second device layer in a top portion of the second wafer; forming a first groove in the first device layer; forming a second groove in the second device layer; bonding the first and second wafers together after at least one of the first and second grooves is formed; and dicing the bonded first and second wafers by a cutting process, wherein the cutting process cuts through the first and second grooves.

Claims (45)

1. A method, comprising:

providing first and second wafers;

forming a first device layer in a top portion of the first wafer;

forming a second device layer in a top portion of the second wafer;

forming a first groove in the first device layer;

forming a second groove in the second device layer;

bonding the first and second wafers together after at least one of the first and second grooves is formed; and

dicing the bonded first and second wafers by a cutting process, wherein the cutting process cuts through the first and second grooves,

wherein the first groove has a first sidewall, a cut made by the cutting process has a second sidewall, and the first sidewall has a slope smaller than that of the second sidewall.

2. The method of claim 1 , wherein each of the first and second grooves is formed by a laser grooving process.

3. The method of claim 2 , wherein the cutting process includes mechanical dicing with a saw or a blade.

4. The method of claim 1 , wherein, after the bonding, the second groove is directly under the first groove.

5. The method of claim 1 , wherein the first groove extends completely through the first device layer and the second groove extends completely through the second device layer.

6. The method of claim 1 , wherein, after the bonding, a bottom surface of the first wafer directly faces a top surface of the second device layer.

7. The method of claim 6 , wherein the bottom surface of the first wafer includes a first bond pad and the top surface of the second device layer includes a second bond pad, and wherein the bonding physically joins the first bond pad to the second bond pad.

8. The method of claim 6 , further comprising:

forming a through-substrate-via (TSV) in the first wafer prior to the bonding, such that the TSV electrically couples the first device layer to a bond pad at the bottom surface of the first wafer.

9. The method of claim 1 , further comprising:

forming a through-substrate-via (TSV) in the first wafer prior to the bonding, such that the TSV electrically couples the first device layer to the second device layer after the bonding.

10. A method of fabricating a stacked semiconductor device, comprising:

providing a first structure having a first substrate and a first device layer on the first substrate;

providing a second structure having a second substrate and a second device layer on the second substrate;

forming a second groove in the second device layer;

bonding a bottom surface of the first substrate to a top surface of the second device layer;

after the bonding, forming a first groove in the first device layer; and

cutting through the first groove, the first substrate, the second groove, and the second substrate in sequence,

wherein the first groove has a first sidewall, the first substrate has a second sidewall formed by the cutting, and the first sidewall has a surface roughness larger than that of the second sidewall.

11. The method of claim 10 , wherein each of the first and second grooves is formed by a laser grooving process.

12. The method of claim 10 , wherein the cutting includes a mechanical dicing with a saw or a blade.

13. The method of claim 10 , wherein the first groove extends into a top portion of the first substrate and the second groove extends into a top portion of the second substrate.

14. The method of claim 10 , wherein each of the first and second grooves is along a scribing channel.

15. A method of fabricating a stacked semiconductor device, comprising:

providing a first structure having a first substrate and a first device layer on the first substrate;

providing a second structure having a second substrate and a second device layer on the second substrate;

forming a through-substrate-via (TSV) in the first substrate, such that the TSV electrically couples the first device layer to a bond pad at a bottom surface of the first substrate;

forming a second groove in the second device layer;

bonding the bottom surface of the first substrate to a top surface of the second device layer, thereby forming bonded first and second structures;

after the bonding, forming a first groove in the first device layer; and

dicing the bonded first and second structures by a cutting process, wherein the cutting process cuts through the first and second grooves,

wherein the first groove has a first sidewall, the first substrate has a second sidewall made by the cutting process, and the first sidewall has a slope smaller than that of the second sidewall.

16. The method of claim 15 , wherein each of the first and second grooves is along a scribing channel.

17. The method of claim 15 , wherein the first groove extends into a top portion of the first substrate and the second groove extends into a top portion of the second substrate.

18. The method of claim 15 , wherein, after the bonding, the first groove is directly above the second groove.

19. The method of claim 15 , wherein each of the first and second grooves is formed by a laser grooving process, and wherein the cutting process includes a mechanical dicing process.

20. The method of claim 15 , wherein, after the bonding and prior to the dicing, a void remains in the second groove.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2019
From: LU, TSUNG-HSING; HE, JUN; CHU, LI-HUAN; TSAO, PEI-HAW
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 050957/0149 →
Continuity (2)
Provisional Application 62738395 · Sep 28, 2018
Related Publication 20200105600A1 · Apr 2, 2020
Cited By (1)
US 12,512,429