IP Library › Granted Patent US 11,143,817
Granted Patent B2
US 11,143,817 · App. 16/682,935 · Granted Oct 12, 2021

Semiconductor structure and manufacturing method of the same

Inventors: Yung-Chang Chang (Taipei, TW); Chung-Yen Chou (Hsinchu, TW); Ming-Chyi Liu (Hsinchu, TW); Shih-Chang Liu (Kaohsiung County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
G02B6/136G02B6/12002G02B6/124G02B6/1228G02B2006/12061G02B2006/12107G02B2006/12195
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Quick Facts
Patent No.
US 11,143,817
App. No.
16/682,935
Granted
Oct 12, 2021
Kind
B2
Abstract

A semiconductor structure is disclosed. The semiconductor structure includes: a substrate and a gate element over the substrate. The gate element includes: a gate dielectric layer over the substrate; a gate electrode over the gate dielectric layer; and a waveguide passing through the gate electrode from a top surface of the gate electrode to a bottom surface of the gate electrode. A manufacturing method of the same is also disclosed.

Claims (34)

1. A semiconductor structure, comprising:

a gate element, the gate element including:

a gate dielectric layer; and

a gate electrode over the gate dielectric layer;

an insulation layer over and covering a top surface and sidewalls of the gate element, and a bottom of the insulation layer is coplanar with a bottom of the gate element; and

a waveguide passing the insulation layer and further passing through the gate electrode from a top surface of the gate electrode to a bottom surface of the gate electrode, and further extending into the gate dielectric layer without passing through the gate dielectric layer.

2. The semiconductor structure of claim 1 , wherein the waveguide is filled with air, and the insulation layer and the gate element are exposed to the air through sidewall of the waveguide.

3. The semiconductor structure of claim 1 , further comprising a pair of spacers formed along sidewalls of the gate dielectric layer and the gate electrode.

4. The semiconductor structure of claim 1 , further comprising a contact etch stop layer covering a top surface of the gate electrode.

5. The semiconductor structure of claim 1 , wherein the gate electrode includes polysilicon.

6. The semiconductor structure of claim 1 , wherein the waveguide has a tapered structure.

7. The semiconductor structure of claim 1 , wherein the waveguide has a round bottom.

8. A semiconductor structure, comprising:

a substrate;

an insulation layer over the substrate; and

a waveguide over the substrate; and

wherein a sidewall of the waveguide is encompassed by a gate element and the insulation layer, and the gate element includes a gate dielectric layer, a gate electrode and a pair of spacers along sidewalls of the gate dielectric layer and the gate electrode, wherein the insulation layer covers a top surface and sidewalls of the gate element, and a bottom of the insulation layer is coplanar with a bottom of the gate element, and the gate dielectric layer includes a recessed region, and the waveguide fills the recessed region, and the waveguide is separated from the substrate by the gate dielectric layer.

9. The semiconductor structure of claim 8 , wherein the waveguide is filled with air, and the insulation layer and the gate element are exposed to the air through sidewall of the waveguide.

10. The semiconductor structure of claim 8 , wherein the gate dielectric layer is over the substrate, the gate electrode is over the gate dielectric layer, and a silicon nitride layer is over the gate electrode.

11. The semiconductor structure of claim 10 , wherein the sidewall of the waveguide is encompassed by the gate electrode of the gate element.

12. The semiconductor structure of claim 11 , wherein the sidewall of the waveguide is further encompassed by the silicon nitride layer of the gate element.

13. The semiconductor structure of claim 10 , wherein a width of a bottom surface of the waveguide is narrower than a width of the gate dielectric layer.

14. The semiconductor structure of claim 10 , wherein the gate electrode includes polysilicon.

15. The semiconductor structure of claim 8 , further comprising an inter level dielectric (ILD) material including a metallization layer over the substrate.

16. The semiconductor structure of claim 15 , wherein the waveguide is further encompassed by the ILD material.

17. A semiconductor structure, comprising:

a gate element over a grating coupler for coupling a laser signal, wherein the gate element includes:

a gate dielectric layer; and

a gate electrode over the gate dielectric layer;

an insulation layer over and covering a top surface and sidewalls of the gate element, and a bottom of the insulation layer is coplanar with a bottom of the gate element; and

a cavity allowing the laser signal passing through the insulation layer and the gate electrode from a top surface of the gate electrode to a bottom surface of the gate electrode, and the cavity further extending into the gate dielectric layer without passing through the gate dielectric layer.

18. The semiconductor structure of claim 17 , further comprising a pair of spacers formed along sidewalls of the gate dielectric layer and the gate electrode.

19. The semiconductor structure of claim 17 , wherein the cavity has a tapered structure.

20. The semiconductor structure of claim 17 , wherein the cavity has a round bottom.

Continuity (3)
Continuation 15875577 · Jan 19, 2018
Provisional Application 62579046 · Oct 30, 2017
Related Publication 20200081185A1 · Mar 12, 2020