IP Library › Granted Patent US 11,171,667
Granted Patent B2
US 11,171,667 · App. 16/855,524 · Granted Nov 9, 2021

Apparatus and method for decoding of low-density parity check codes in wireless communication system

Inventors: Min Jang (Suwon-si, KR); Hyuntack Lim (Suwon-si, KR); Hongsil Jeong (Suwon-si, KR); Hayoung Yang (Suwon-si, KR); Joohyun Lee (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H03M13/1128H03M13/616
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Quick Facts
Patent No.
US 11,171,667
App. No.
16/855,524
Granted
Nov 9, 2021
Kind
B2
Abstract

The present disclosure relates to a pre-5 th -Generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4 th -Generation (4G) communication system, such as long-term evolution (LTE). The disclosure provides decoding of a low-density parity-check (LDPC) code in a wireless communication system, and a decoding method of the LDPC code may include receiving a codeword, performing decoding iterations on the codeword a predefined maximum number of times using a parity check matrix, performing partial decoding using a partial area of the parity check matrix, and determining decoding success or failure of the codeword based a result of the partial decoding.

Claims (36)

1. A method for decoding a low-density parity-check (LDPC) code in a wireless communication system, the method comprising:

receiving a codeword comprising an inner code and an outer code;

performing decoding iterations on the codeword, for a predefined maximum number of times using a parity check matrix;

after performing the decoding iterations on the codeword, for the predefined maximum number of times using the parity check matrix, performing an additional decoding that is a partial decoding using a partial area of the parity check matrix; and

determining decoding success or failure of the codeword based on a result of the partial decoding,

wherein the partial area comprises an area associated with the inner code.

2. The method of claim 1 , wherein another area than the partial area in the parity check matrix comprises a parity portion of a degree 1.

3. The method of claim 1 , wherein the performing of the decoding iterations comprises:

sequentially decoding submatrices of the parity check matrix.

4. The method of claim 1 , wherein the result of the partial decoding comprises a syndrome-check result of check nodes corresponding to the partial area.

5. The method of claim 1 , further comprising:

terminating the decoding, when two decoding iterations, before the decoding iterations of the maximum number of times, consecutively pass syndrome-check in two decoding iterations.

6. A method for decoding a low-density parity-check (LDPC) code in a wireless communication system, the method comprising:

receiving a codeword;

decoding the codeword using a parity check matrix;

generating a first codeword by re-encoding values corresponding to a message bit vector among values acquired through the decoding;

generating a second codeword by hard-deciding the values acquired through the decoding; and

determining decoding success or failure of the codeword based on a comparison result of the first codeword and the second codeword.

7. The method of claim 6 , wherein the determining of the decoding success or failure of the codeword comprises:

comparing parity bits of the first codeword and parity bits of the second codeword.

8. The method of claim 6 , wherein the determining of the decoding success or failure of the codeword comprises:

in response to identifying the first codeword and the second codeword are identical, determining the decoding success; and

in response to identifying the first codeword and the second codeword are different, determining the decoding failure.

9. The method of claim 6 , wherein the values acquired through the decoding comprise log likelihood ratio (LLR) values.

10. An apparatus for using a low-density parity-check (LDPC) code in a wireless communication system, the apparatus comprising:

a transceiver; and

at least one processor operably coupled to the transceiver, and configured to:

receive a codeword comprising an inner code and an outer code,

perform decoding iterations on the codeword, for a predefined maximum number of times using a parity check matrix,

after performing the decoding iterations on the codeword, for the predefined maximum number of times using the parity check matrix, perform an additional decoding that is a partial decoding using a partial area of the parity check matrix, and

determine decoding success or failure of the codeword based on a result of the partial decoding,

wherein the partial area comprises an area associated with the inner code.

11. The apparatus of claim 10 , wherein other area than the partial area in the parity check matrix comprises a parity portion of a degree 1.

12. The apparatus of claim 10 , wherein the at least one processor is further configured to sequentially decode submatrices of the parity check matrix.

13. The apparatus of claim 10 , wherein the result of the partial decoding comprises a syndrome-check result of check nodes corresponding to the partial area.

14. The apparatus of claim 10 , wherein the at least one processor is further configured to terminate the decoding, when two decoding iterations, before the decoding iterations of the maximum number of times, consecutively pass syndrome-check in two decoding iterations.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2020
From: JANG, MIN; LIM, HYUNTACK; JEONG, HONGSIL; YANG, HAYOUNG; LEE, JOOHYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 052468/0008 →
Priority Claims (1)
KR 10-2019-0052566 · May 3, 2019 · national
Continuity (1)
Related Publication 20200350927A1 · Nov 5, 2020
Cited By (3)
US 12,308,855 US 12,362,766 US 12,603,802