Granted Patent B2

US 12,308,855 · App. 18/133,459 · Granted May 20, 2025

Inventor: Zion Kwok (Burnaby, CA)

Assignee: SK Hynix NAND Product Solutions Corp.

H03M13/095H03M13/611

Abstract

Claims (99)

1. A method, comprising:

(a) receiving data and an expected error-detecting code value corresponding to the data;

(b) processing the data in at least two portions, wherein the processing of each respective portion of the at least two portions comprises:

calculating an error-detecting code value for the respective portion; and

storing, in memory, the error-detecting code value for the respective portion;

(c) calculating an overall error-detecting code value based on the respective error-detecting code values for the at least two portions;

(d) when the overall error-detecting code value or an updated overall error-detecting code value does not match the expected error-detecting code value:

correcting at least one of the at least two portions to generate an at least two corrected portions; and

processing the at least two corrected portions, wherein the processing the at least two corrected portions comprises:

calculating an updated error-detecting code value for a respective one of the at least two corrected portions; and

calculating the updated overall error-detecting code value based on the updated error-detecting code value for the respective portion of the at least two corrected portions and the stored error-detecting code value; and

(e) repeating (d) until the updated overall error-detecting code value matches the expected error-detecting code value.

2. The method of claim 1 , wherein correcting at least one of the at least two portions to generate an at least two corrected portions comprises:

requesting a portion of the data to be retransmitted; and

receiving the retransmitted portion of the data.

3. The method of claim 1 , wherein receiving data and the expected error-detecting code value corresponding to the data comprises receiving an expected linear error-detecting code value corresponding to the data.

4. The method of claim 3 , wherein receiving the expected linear error-detecting code value corresponding to the data comprises receiving a low-density parity-check codeword corresponding to the data.

5. The method of claim 1 , wherein the at least two portions are of similarly equivalent length.

6. The method of claim 1 , wherein processing the data in at least two portions further comprises:

determining that a first portion of the at least two portions is of a first length and that a second portion of the at least two portions is of a second length, the second length being greater than the first length; and

padding the first portion of the at least two portions with zeros such that the first portion is of a similarly equivalent length as the second length.

7. The method of claim 1 , wherein the processing of each respective portion of the at least two portions further comprises:

determining an error-detecting code state that corresponds to the respective portion, wherein the error-detecting code state is one of (a) a correct error-detecting code state and (b) an incorrect error-detecting code state; and

storing, in memory, the error-detecting code state that corresponds to the respective portion.

8. The method of claim 7 , wherein correcting at least one of the at least two portions to generate the at least two corrected portions comprises:

selecting at least one portion of the at least two portions that corresponds to an incorrect error-detecting code state;

correcting the selected at least one portion of the at least two portions that corresponds to an incorrect error-detecting code state to generate at least two corrected portions; and

setting the error-detecting code state that corresponds to each of the at least two corrected portions to a correct error-detecting code state.

9. The method of claim 1 , wherein storing, in memory, the error-detecting code value for the respective portion comprises overwriting a previously stored error-detecting code value for a portion.

10. The method of claim 1 , wherein calculating the updated overall error-detecting code value based on the updated error-detecting code value for the respective portion of the at least two corrected portions and the stored error-detecting code value comprises:

determining a difference of the updated error-detecting code value and a stored error-detecting code value for the updated portion; and

calculating the updated overall error-detecting code value based on the difference of the updated error-detecting code value and a stored error-detecting code value for the updated portion and the stored error-detecting code values for the at least two portions.

11. A system comprising:

a memory; and

processing circuitry, configured to:

(a) receive data and an expected error-detecting code value corresponding to the data;

(b) process the data in at least two portions, wherein the processing of each respective portion of the at least two portions comprises:

calculate an error-detecting code value for the respective portion; and

store, in the memory, the error-detecting code value for the respective portion,

(c) calculate an overall error-detecting code value, based on the respective error-detecting code values for the at least two portions;

(d) when the overall error-detecting code value or an updated overall error-detecting code value does not match the expected error-detecting code value:

correct at least one of the at least two portions to generate an at least two corrected portions; and

process the at least two corrected portions, wherein the processing the at least two corrected portions comprises:

calculate an updated error-detecting code value for a respective one of the at least two corrected portions; and

calculate the updated overall error-detecting code value based on the updated error-detecting code value for the respective portion of the at least two corrected portions and the stored error-detecting code value; and

(e) repeat (d) until the updated overall error-detecting code value matches the expected error-detecting code value.

12. The system of claim 11 , wherein to correct at least one of the at least two portions to generate an at least two corrected portions, the processing circuitry to:

request a portion of the data to be retransmitted; and

receive the retransmitted portion of the data.

13. The system of claim 11 , wherein the expected error-detecting code value corresponding to the data comprises an expected linear error-detecting code value corresponding to the data.

14. The system of claim 13 , wherein the expected linear error-detecting code value corresponding to the data comprises a low-density parity-check codeword corresponding to the data.

15. The system of claim 11 , wherein the at least two portions are of similarly equivalent length.

16. The system of claim 11 , wherein to process the data in at least two portions, the processing circuitry is further to:

determine that a first portion of the at least two portions is of a first length and that a second portion of the at least two portions is of a second length, the second length being greater than the first length; and

pad the first portion of the at least two portions with zeros such that the first portion is of a similarly equivalent length as the second length.

17. The system of claim 11 , wherein to process each respective portion of the at least two portions, the processing circuitry is further to:

determine an error-detecting code state that corresponds to the respective portion, wherein the error-detecting code state is one of (a) a correct error-detecting code state and (b) an incorrect error-detecting code state; and

store, in memory, the error-detecting code state for the respective portion.

18. The system of claim 17 , wherein to correct at least one of the at least two portions to generate the at least two corrected portions, the processing circuitry is to:

select at least one portion of the at least two portions that corresponds to an incorrect error-detecting code state;

correct the selected at least one portion of the at least two portions that corresponds to an incorrect error-detecting code state to generate at least two corrected portions; and

set the error-detecting code state that corresponds to each of the at least two corrected portions to a correct error-detecting code state.

19. The system of claim 11 , wherein to store, in memory, the error-detecting code value for the respective portion, the processing circuitry is to overwrite a previously stored error-detecting code value for a portion.

20. The system of claim 11 , wherein to calculate the updated overall error-detecting code value based on the updated error-detecting code value for the respective portion of the at least two corrected portions and the stored error-detecting code value, the processing circuitry is to:

determine a difference of the updated error-detecting code value and a stored error-detecting code value for the updated portion; and

calculate the updated overall error-detecting code value, based on the difference of the updated error-detecting code value and a stored error-detecting code value for the updated portion and the stored error-detecting code values for the at least two portions.

21. A non-transitory computer-readable medium having non-transitory computer-readable instructions encoded thereon that, when executed by processing circuitry, cause the processing circuitry to:

(a) receive data and an expected error-detecting code value corresponding to the data;

(b) process the data in at least two portions, wherein the processing of each respective portion of the at least two portions comprises:

calculate an error-detecting code value for the respective portion; and

store, in memory, the error-detecting code value for the respective portion;

(c) calculate an overall error-detecting code value, based on the respective error-detecting code values for the at least two portions;

(d) when the overall error-detecting code value or an updated overall error-detecting code value does not match the expected error-detecting code value:

correct at least one of the at least two portions to generate an at least two corrected portions;

process the at least two corrected portions, wherein the processing the at least two corrected portions comprises:

calculate an updated error-detecting code value for a respective one of the at least two corrected portions; and

calculate the updated overall error-detecting code value, based on the updated error-detecting code value for the respective portion of the at least two corrected portions and the stored error-detecting code value; and

(e) repeat (d) until the updated overall error-detecting code value matches the expected error-detecting code value.

22. The non-transitory computer-readable medium of claim 21 , wherein to correct at least one of the at least two portions to generate an at least two corrected portions, the processing circuitry to:

request a portion of the data to be retransmitted; and

receive the retransmitted portion of the data.

23. The non-transitory computer-readable medium of claim 21 , wherein the expected error-detecting code value corresponding to the data comprises the expected linear error-detecting code value corresponding to the data.

24. The non-transitory computer-readable medium of claim 23 , wherein the expected linear error-detecting code value corresponding to the data comprises the low-density parity-check codeword corresponding to the data.

25. The non-transitory computer-readable medium of claim 21 , wherein the at least two portions are of similarly equivalent length.

26. The non-transitory computer-readable medium of claim 21 , wherein to process the data in at least two portions, the processing circuitry is further to:

determine that a first portion of the at least two portions is of a first length and that a second portion of the at least two portions is of a second length, the second length being greater than the first length; and

pad the first portion of the at least two portions with zeros such that the first portion is of a similarly equivalent length as the second length.

27. The non-transitory computer-readable medium of claim 21 , wherein to process each respective portion of the at least two portions, the processing circuitry is further to:

determine an error-detecting code state that corresponds to the respective portion, wherein the error-detecting code state is one of (a) a correct error-detecting code state and (b) an incorrect error-detecting code state; and

store, in memory, the error-detecting code state for the respective portion.

28. The non-transitory computer-readable medium of claim 27 , wherein to correct at least one of the at least two portions to generate the at least two corrected portions, the processing circuitry is to:

select at least one portion of the at least two portions that corresponds to an incorrect error-detecting code state;

correct the selected at least one portion of the at least two portions that corresponds to an incorrect error-detecting code state to generate at least two corrected portions; and

set the error-detecting code state that corresponds to each of the at least two corrected portions to a correct error-detecting code state.

29. The non-transitory computer-readable medium of claim 21 , wherein storing, in memory, the error-detecting code value for the respective portion comprises:

overwrite a previously stored error-detecting code value for a portion.

30. The non-transitory computer readable medium of claim 21 , wherein to calculate the updated overall error-detecting code value based on the updated error-detecting code value for the respective portion of the at least two corrected portions and the stored error-detecting code value, the processing circuitry is to:

determine a difference of the updated error-detecting code value and a stored error-detecting code value for the updated portion; and

calculate the updated overall error-detecting code value, based on the difference of the updated error-detecting code value and a stored error-detecting code value for the updated portion and the stored error-detecting code values for the at least two portions.

Assignments (1)

Continuity (1)

References Cited (9)