IP Library Granted Patent US 11,183,392
Granted Patent B2
US 11,183,392 · App. 16/860,956 · Granted Nov 23, 2021

Method for manufacturing semiconductor devices and structures thereof

Inventors: Jiann-Horng Lin (Hsinchu, TW); Chao-Kuei Yeh (Changhua County, TW); Ying-Hao Wu (Taoyuan, TW); Tai-Yen Peng (Hsinchu, TW); Chih-Hao Chen (Hsinchu, TW); Chih-Sheng Tian (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
H01L21/3086H01L21/0274H01L21/0332H01L21/0337H01L21/31111H01L21/31144H01L21/76805H01L21/76811
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,183,392
App. No.
16/860,956
Granted
Nov 23, 2021
Kind
B2
Abstract

According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.

Claims (59)

1. A method of manufacturing a semiconductor device, comprising:

forming a first mandrel and a second mandrel over a mask layer;

depositing a spacer layer over the first mandrel and the second mandrel;

forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel;

depositing a protection layer over the line-end cut pattern;

etching the protection layer and exposing an upper portion of the line-end cut pattern;

reducing a width of the line-end cut pattern;

etching the spacer layer to expose the first mandrel and the second mandrel; and

patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.

2. The method of claim 1 , wherein forming the line-end cut atte comprises:

forming a patterned mask over the spacer layer, the patterned mask comprising an opening exposing a portion of the spacer layer between the first mandrel and the second mandrel;

depositing a sacrificial material in the opening; and

removing excess portions of the sacrificial material over the opening using a planarization operation.

3. The method of claim 1 , wherein the etching of the protection layer is performed by a same operation as that reducing the width of the line-end cut pattern.

4. The method of claim 1 , wherein the reducing of the width of the line-end cut pattern also reduces a height of the line-end cut pattern.

5. The method of claim 1 , wherein depositing a protection layer over the line-end cut pattern comprises depositing the protection layer to cover an upper surface and sidewalls of the spacer layer.

6. The method of claim 1 , wherein etching the protection layer comprises etching sidewalk of the protection layer with a first etch rate and horizontal portions of the protection layer with a second etch rate less than the first etch rate.

7. The method of claim 1 , wherein the protection layer comprises at least one of a nitride, an oxide and a carbon-based material.

8. The method of claim 1 , wherein the line-end cut pattern comprises titanium oxide, tantalum oxide, silicon oxide, silicon nitride, silicon carbide, or a combination thereof.

9. The method of claim 1 , wherein the line-end cut pattern comprises at least one pillar, further comprising patterning a target layer using the patterned mask layer and forming segments of a conductive line in the target layer, wherein a width of the pillar corresponds to a spacing of the segments.

10. The method of claim 1 , wherein the line-end cut pattern masks a second horizontal portion of the spacer layer from being etched while the spacer layer is being etched.

11. A method of manufacturing a semiconductor device, comprising:

providing a mandrel layer having a first opening;

depositing a spacer layer over and along sidewalls of the first opening;

forming a first patterned mask over the spacer layer, wherein the first patterned mask comprises a second opening exposing a first portion of the spacer layer;

filling the second opening with a sacrificial material;

planarizing the sacrificial material and the first pattered mask;

removing the planarized first patterned mask while leaving the sacrificial material in the second opening to form a line-end cut pattern;

depositing a protection layer to cover the line-end cut pattern;

etching a lateral portion of the protection layer to expose sidewalls of the spacer layer and removing a thickness of the line-end cut pattern;

completely removing the protection layer;

patterning the spacer layer so that a second portion of the spacer layer remain on sidewalls of the mandrel layer; and

forming a second patterned mask by removing the mandrel layer while leaving the line-end cut pattern and the patterned spacer layer.

12. The method of claim 11 , wherein the sacrificial material is differentiated from the spacer layer by an etching selectivity of between about 3 and about 10.

13. The method of claim 11 , wherein the protection layer is differentiated from the spacer layer by an etching selectivity of between about 3 and about 10.

14. The method of claim 11 , wherein the sacrificial material is an inorganic material.

15. The method of claim 11 , wherein the line-end cut pattern masks a bottom portion of the spacer layer in the first opening from being etched while the spacer layer is patterned.

16. The method of claim 11 , wherein forming a first patterned mask over the spacer layer comprises:

depositing a photoresist stack over the spacer layer; and

forming the second opening through the photoresist stack.

17. The method of claim 16 , wherein depositing a photoresist stack over the spacer layer comprises:

depositing a bottom layer over the spacer layer;

depositing a middle layer over the bottom layer;

depositing an upper layer over the middle layer; and

prior to depositing the sacrificial material in the second opening, removing the upper layer.

18. A method comprising:

patterning a plurality of mandrels over a mask layer;

depositing a spacer layer over and along sidewalls of the plurality of mandrels;

forming a patterned mask over the spacer layer, the patterned mask comprising an opening exposing a portion of the spacer layer between two adjacent mandrels;

depositing a sacrificial material over the patterned mask in the opening;

removing the patterned mask thereby forming a line-end cut pattern on the spacer layer;

depositing a protection layer to cover the sacrificial material and the spacer layer;

performing an isotropic etching on the protection layer to expose the line-end cut pattern;

etching sidewalls of the line-end cut pattern;

patterning the spacer layer to expose the plurality of mandrels;

removing the plurality of mandrels; and

patterning the mask layer using sidewall portions of the spacer layer and the etched line-end cut pattern as an etch mask.

19. The method of claim 18 , further comprising completely removing the protection layer prior to patterning the spacer layer.

20. The method of claim 18 , wherein depositing the sacrificial material comprises depositing the sacrificial material at about 200° C. or below.

Continuity (3)
Continuation 16121343 · Sep 4, 2018
Provisional Application 62589162 · Nov 21, 2017
Related Publication 20200258754A1 · Aug 13, 2020