IP Library Granted Patent US 11,211,499
Granted Patent B2
US 11,211,499 · App. 15/973,835 · Granted Dec 28, 2021

Semiconductor device and manufacturing method thereof

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L27/1225H01L2924/0002
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Quick Facts
Patent No.
US 11,211,499
App. No.
15/973,835
Granted
Dec 28, 2021
Kind
B2
Abstract

It is an object to provide a semiconductor device with less power consumption as a semiconductor device including a thin film transistor using an oxide semiconductor layer. It is an object to provide a semiconductor device with high reliability as a semiconductor device including a thin film transistor using an oxide semiconductor layer. In the semiconductor device, a gate electrode layer (a gate wiring layer) intersects with a wiring layer which is electrically connected to a source electrode layer or a drain electrode layer with an insulating layer which covers the oxide semiconductor layer of the thin film transistor and a gate insulating layer interposed therebetween. Accordingly, the parasitic capacitance formed by a stacked-layer structure of the gate electrode layer, the gate insulating layer, and the source or drain electrode layer can be reduced, so that low power consumption of the semiconductor device can be realized.

Claims (20)

1. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer comprising a channel formation region;

a gate insulating layer between the gate electrode and the oxide semiconductor layer; and

source and drain electrodes in electrical contact with the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the oxide semiconductor layer is over the gate electrode,

wherein the channel formation region of the oxide semiconductor layer comprises a crystalline portion with a grain diameter greater than or equal to 2 nm and less than or equal to 4 nm,

wherein each of the source and drain electrodes comprises copper, and

wherein the gate electrode comprises copper.

2. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer;

a gate insulating layer between the gate electrode and the oxide semiconductor layer; and

source and drain electrodes in electrical contact with the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the oxide semiconductor layer is over the gate electrode, and

wherein the oxide semiconductor layer comprises a crystalline portion with a grain diameter greater than or equal to 2 nm and less than or equal to 4 nm,

wherein each of the source and drain electrodes comprises copper, and

wherein the gate electrode comprises copper.

Priority Claims (1)
JP 2009-214485 · Sep 16, 2009 · national
Continuity (2)
Continuation 12880259 · Sep 13, 2010
Related Publication 20180261699A1 · Sep 13, 2018
Cited By (1)
US 12,635,485